Work group computing for electronic design automation

• US 5,983,277 A
• Filed: 10/27/1997
• Issued: 11/09/1999
• Est. Priority Date: 10/28/1996
• Status: Expired due to Term

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Fairbanks, Brent A., Heile, Francis B.
• Primary Examiner(s): Asta, Frank J.
• Assistant Examiner(s): WILLETT, STEPHAN F
• Application Number:
  US08/957,957
• Time in Patent Office: 743 Days
• Field of Search: 709/226, 709/207, 709/225, 709/232, 709/244, 709/215
• US Class Current: 709/232
• CPC Class Codes: G01R 31/3177 Testing of logic operation, e.g. by logic analysers
• CPC Class Codes: G01R 31/318516 Test of programmable logic devices [PLDs]
• CPC Class Codes: G06F 11/0748 in a remote unit communicating with a single-box computer node experiencing an error/fault remote testing G06F11/2294
• CPC Class Codes: G06F 11/2294 by remote test
• CPC Class Codes: G06F 2111/02 CAD in a network environment, e.g. collaborative CAD or distributed simulation
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking
• CPC Class Codes: G06F 30/3308 using simulation
• CPC Class Codes: G06F 30/331 with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 30/347 Physical level, e.g. placement or routing
• CPC Class Codes: G06F 8/60 Software deployment
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 8/71 Version control security arrangements therefor G06F21/57; Configuration management
• CPC Class Codes: G06Q 10/06 Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling
• CPC Class Codes: G06Q 10/10 Office automation; Time management
• CPC Class Codes: Y10S 707/99953 Recoverability
• CPC Class Codes: Y10S 707/99954 Version management

Abstract

A work group computing system for facilitating programmable logic device design among multiple engineers has a global work space including design project source files, a compilation basis, a compilation report text file, a binary assignments database and a user-readable assignments text file. Any number of local work spaces contain downloaded versions of any of the project source files, local compilation processing results for that user and a local assignment database containing records of downloaded assignments. Downloaded project source files or assignments are assigned states by the user such as default, locked, owned-write, owned-read only to facilitate coordination amongst the user engineers. The system controls editing of files so that two engineers may not inadvertently edit the same global source file at the same time. Individual engineers receive automatic updates of new versions of source files; files that are being edited are locked, and an isolation mode allows an engineer to work with source files in an unchanging state. Each engineer incrementally compiles local changes made to source files in his own user work space to produce a local set of compilation and processing results. Incremental compilation uses unedited source files, the basis from the global work space, and the user'"'"'s edited local files to produce the local processing results. Upon satisfactory results, edited source files and local processing results may replace and overwrite global files and results. Multiple engineers are allowed to work on complex logic design that can be implemented on a single, large capacity device.

Claims

1. A work group computing system for facilitating an electronic design by a plurality of users, said work group computing system comprising:

a global work space located on a computer of said computing system, said global work space including a plurality of project source files specifying said electronic design and a global basis specifying compilation results from a compilation of said project source files;

an incremental compiler for compiling incremental changes to said electronic design;

a first user work space located on a first computer of said computing system, said first user work space including

a first file copy of a first one of said project source files, said first file specifying a first portion of said electronic design and being modifiable by a first user to produce a modified first file in said first user work space, said modified first file being transferable back to said global work space to overwrite said first one of said project source files in said global work space, and

a local basis specifying compilation results from a compilation of said project source files of said global work space and said modified first file, said local basis being produced by said incremental compiler and being transferable to said global work space to overwrite said global basis; and

a second user work space located on a second computer of said computing system, said second user work space including

a second file copy of a second one of said project source files, said second file specifying a second portion of said electronic design and being modifiable by a second user to produce a modified second file in said second user work space, said modified second file being transferable back to said global work space to overwrite said second one of said project source files in said global work space, such that said project source files may be simultaneously modified by said first and said second users, whereby said project source files may be used to program said electronic design.

2. A work group computing system as recited in claim 1 wherein said electronic design is a programmable logic device and said global basis may be used to program said programmable logic device.

3. A work group computing system as recited in claim 1 wherein said global work space, said first user work space and said second user work space are on different computer systems.

4. A work group computing system as recited in claim 1 further including a third file of said project source files, said third file being in a default mode and being automatically transferable to said second user work space upon a triggering event such that said second user work space automatically receives an updated version of said third file.

5. A computer-implemented method of facilitating an electronic design by a plurality of users in a work group computing system, said method comprising:

storing in a global work space on a computer of said computing system a plurality of project source files specifying said electronic design and a global basis specifying compilation results from a compilation of said project source files;

transferring a first file of said plurality of project source files to a first user work space on a first computer such that said first file may be modified by said first user, said first file specifying a first portion of said electronic design;

incrementally compiling a subset of said project source files from said global work space along with said modified first file to produce a local basis specifying compilation results, said local basis being produced by an incremental compiler and being transferable to said global work space to overwrite said global basis; and

transferring a second file of said plurality of project source files to a second user work space on a second computer such that said second file may be modified by said second user, said second file specifying a second portion of said electronic design, whereby said electronic design may be modified simultaneously by said plurality of users.

6. A method as recited in claim 5 further comprising:

receiving in said global work space from said first user work space said modified first file and overwriting said first file in said global work space with said modified first file; and

receiving in said global work space from said second user work space said modified second file and overwriting said second file in said global work space with said modified second file, whereby modifications made by said first and second users are reflected in said global work space and said project source files of said global work space may be used to program said electronic design.

7. A method as recited in claim 5 wherein said electronic design is a programmable logic device and said global basis may be used to program said programmable logic device.

8. A method as recited in claim 5 wherein said global work space, said first user work space and said second user work space are on different computer systems.

9. A method as recited in claim 5 wherein a third file of said project source files is in a default mode and said method further includes the step of

automatically transferring said third file from said global work space to said second user work space upon a triggering event such that said second user work space automatically receives an updated version of said third file.

10. A computer-implemented method of facilitating an electronic design by a plurality of users in a work group computing system, said electronic design including a plurality of project source files in a global work space and a global basis specifying compilation results from a compilation of said project source files, said method comprising:

receiving a command to transfer one of said source files from said global work space located on a computer of said computing system to a local user work space located on a local computer, said source file specifying a portion of said electronic design;

determining whether said source file is currently being modified by one of said users;

transferring said source file to said local user work space such that said source file may be modified in said local user work space to produce a modified source file;

setting a lock indicator indicating that said source file is currently being modified;

compiling a subset of said project source files along with said modified file using an incremental compiler to produce a local basis specifying compilation results;

receiving a command to transfer said modified source file from said local user work space to said global work space;

transferring said local basis to said global work space to overwrite said global basis; and

transferring said modified source file from said local user work space to said global work space such that said modified source file overwrites said source file, whereby said electronic design is modified.

11. A method as recited in claim 10 wherein said electronic design is a programmable logic device and said project source files may be compiled to program said programmable logic device.

12. A method as recited in claim 10 wherein said global work space and said local user work space are on different computer systems.

13. A method as recited in claim 10 wherein a second file of said project source files is in a default mode and said method further includes the step of

automatically transferring said second file from said global work space to said local user work space upon a triggering event such that said local user work space automatically receives an updated version of said second file.

14. A method as recited in claim 10 further comprising the step of:

transferring a copy of said source file to a second local user work space such that said copy of said source file may be modified in said second local user work space while said source file is being modified in said local user work space.

15. A method as recited in claim 10, wherein after said step of transferring said modified source file, said method further comprises the steps of:

changing a mode of said source file from a locked mode to a default mode; and

automatically transferring said source file from said global work space to said local user work space upon a triggering event such that said local user work space automatically receives an updated version of said source file.

16. A computer program product comprising a computer-usable medium having computer-readable program code embodied thereon for facilitating an electronic design by a plurality of users in a work group computing system, said computer program product comprising computer-readable program code for effecting the following within a computer system:

storing in a global work space on a computer of said computing system a plurality of project source files specifying said electronic design and a global basis specifying compilation results from a compilation of said project source files;

transferring a first file of said plurality of project source files to a first user work space on a first computer such that said first file may be modified by said first user, said first file specifying a first portion of said electronic design;

incrementally compiling a subset of said project source files from said global work space along with said modified first file to produce a local basis specifying compilation results, said local basis being produced by an incremental compiler and being transferable to said global work space to overwrite said global basis; and

transferring a second file of said plurality of project source files to a second user work space on a second computer such that said second file may be modified by said second user, said second file specifying a second portion of said electronic design, whereby said electronic design may be modified simultaneously by said plurality of users.

17. A computer program product as recited in claim 16 further comprising computer-readable program code for effecting the following within a computer system:

receiving in said global work space from said first user work space said modified first file and overwriting said first file in said global work space with said modified first file; and

receiving in said global work space from said second user work space said modified second file and overwriting said second file in said global work space with said modified second file, whereby modifications made by said first and second users are reflected in said global work space and said project source files of said global work space may be used to program said electronic design.

18. A computer program product as recited in claim 16 wherein said electronic design is a programmable logic device and said global basis is used to program said programmable logic device.

19. A computer program product as recited in claim 16 wherein said global work space, said first user work space and said second user work space are on different computer systems.

20. A computer program product as recited in claim 16 wherein said compiling a subset of said project source files is performed using an incremental compiler.

21. A computer program product comprising a computer-usable medium having computer-readable program code embodied thereon for facilitating an electronic design by a plurality of users in a work group computing system, said electronic design including a plurality of project source files in a global work space and a global basis specifying compilation results from a compilation of said project source files, said computer program product comprising computer-readable program code for effecting the following within a computer system:

receiving a command to transfer one of said source files from said global work space located on a computer of said computing system to a local user work space located on a local computer, said source file specifying a portion of said electronic design;

determining whether said source file is currently being modified by one of said users;

transferring said source file to said local user work space such that said source file may be modified in said local user work space to produce a modified source file;

setting a lock indicator indicating that said source file is currently being modified;

compiling a subset of said project source files along with said modified file using an incremental compiler to produce a local basis specifying compilation results;

receiving a command to transfer said modified source file from said local user work space to said global work space;

transferring said local basis to said global work space to overwrite said global basis; and

transferring said modified source file from said local user work space to said global work space such that said modified source file overwrites said source file, whereby said electronic design is modified.

22. A computer program product as recited in claim 21 wherein a second file of said project source files is in a default mode further comprising computer-readable program code for effecting the following step within a computer system:

automatically transferring said second file from said global work space to said local user work space upon a triggering event such that said local user work space automatically receives an updated version of said second file.

23. A computer program product as recited in claim 21 further comprising computer-readable program code for effecting the following step within a computer system:

transferring a copy of said source file to a second local user work space such that said copy of said source file may be modified in said second local user work space while said source file is being modified in said local user work space.

24. A computer program product as recited in claim 21 wherein after said step of transferring said modified source file, said product further comprises computer-readable program code for effecting the following steps within a computer system:

changing a mode of said source file from a locked mode to a default mode; and

automatically transferring said source file from said global work space to said local user work space upon a triggering event such that said local user work space automatically receives an updated version of said source file.

25. A computer program product as recited in claim 21 wherein said electronic design is a programmable logic device and said project source files are compiled to program said programmable logic device.

26. A computer program product as recited in claim 21 wherein said global work space and said local user work space are on different computer systems.

27. An electronic device incorporating an electronic design created by a plurality of users in a work group computing system, said electronic device being made by the method comprising:

storing in a global work space on a computer of said computing system a plurality of project source files specifying said electronic design and a global basis specifying compilation results from a compilation of said project source files;

transferring a first file of said plurality of project source files to a first user work space on a first computer such that said first file may be modified by said first user, said first file specifying a first portion of said electronic design;

incrementally compiling a subset of said project source files from said global work space along with said modified first file to produce a local basis specifying compilation results, said local basis being produced by an incremental compiler and being transferable to said global work space to overwrite said global basis; and

transferring a second file of said plurality of project source files to a second user work space on a second computer such that said second file may be modified by said second user, said second file specifying a second portion of said electronic design, whereby said electronic design may be modified simultaneously by said plurality of users.

28. An electronic device as recited in claim 27 wherein said electronic device is a printed circuit board including integrated circuits.

29. An electronic device as recited in claim 27 wherein said electronic device is a multi-chip module.

30. An electronic device as recited in claim 27 wherein said electronic device is complex integrated circuit.

31. An electronic device as recited in claim 27 wherein said electronic device is an application specific integrated circuit (ASIC).

32. An electronic device as recited in claim 27 wherein said electronic device is a programmable logic device (PLD).

33. An electronic device incorporating a compiled electronic design created by a plurality of users in a work group computing system, said electronic design including a plurality of project source files in a global work space and a global basis specifying compilation results from a compilation of said project source files, said electronic device being made by the method comprising:

receiving a command to transfer one of said source files from said global work space located on a computer of said computing system to a local user work space located on a local computer, said source file specifying a portion of said electronic design;

determining whether said source file is currently being modified by one of said users;

transferring said source file to said local user work space such that said source file may be modified in said local user work space to produce a modified source file;

setting a lock indicator indicating that said source file is currently being modified;

compiling a subset of said project source files along with said modified file using an incremental compiler to produce a local basis specifying compilation results;

receiving a command to transfer said modified source file from said local user work space to said global work space;

transferring said local basis to said global work space to overwrite said global basis; and

transferring said modified source file from said local user work space to said global work space such that said modified source file overwrites said source file, whereby said electronic design is modified.

34. An electronic device as recited in claim 33 wherein said electronic device is a printed circuit board including integrated circuits.

35. An electronic device as recited in claim 33 wherein said electronic device is a multi-chip module.

36. An electronic device as recited in claim 33 wherein said electronic device is complex integrated circuit.

37. An electronic device as recited in claim 33 wherein said electronic device is an application specific integrated circuit (ASIC).

38. An electronic device as recited in claim 33 wherein said electronic device is a programmable logic device (PLD).