Recirculating A/D or D/A converter with single reference voltage

• US 6,016,115 A
• Filed: 02/27/1998
• Issued: 01/18/2000
• Est. Priority Date: 08/29/1995
• Status: Expired due to Fees

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Soprintel S.A.
• Inventors: Heubi, Alexandre
• Primary Examiner(s): Williams, Howard L.
• Application Number:
  US09/032,565
• Time in Patent Office: 690 Days
• Field of Search: 341/110, 341/161, 341/162, 341/163, 341/172, 341/150
• US Class Current: 341/161
• CPC Class Codes: H03M 1/403 using switched capacitors
• CPC Class Codes: H03M 1/667 Recirculation type

Abstract

The converter has a three decision range conversion algorithm using ternary values. The converter has a single unipolar reference voltage source (Vr) and computing method (MC) to establish a voltage value. The voltage value is determined by determining a sum value from the voltage calculated during the previous iteration, and a value which is the product of the ternary value during the preceding iteration and the reference voltage. Computing is by switched capacitors (Cr, C1, C2) connected to a single operational amplifier (11). This provides a more compact circuit with less surface integration having a smaller current requirement whilst having a good conversion quality for applications such as hearing aids.

Claims

1. A converter for converting an input signal into an output signal representing said input signal with a relative precision, the converter implementing a conversion algorithm with three decision ranges involving ternary digital values b_i with b_i =1, 0, or -1, and comprising a single unipolar reference voltage source, means of computation for, in the course of each of the iterations of a sequence of successive iterations of said algorithm, determining a voltage value formed by the sum of a value determined on the basis of the voltage computed in the previous iteration and of a value which is the product of the ternary value obtained in the course of the previous iteration and of said reference voltage, said means of computation comprising for this purpose a unilateral arrangement of a plurality of switched capacitances and a single operational amplifier cooperating with said switched capacitors for delivering said voltage value in each of the said iterations, said converter also comprising generator means for producing, from the successive voltage values computed during said sequence of iterations, successive samples representing, in converted form, said input signal, one of the inputs of said operational amplifier being connected to a fixed potential, said reference source providing a single unipolar reference voltage referenced to said fixed potential.

2. The converter according to claim 1, in which the said input signals are analogue and the said output signals are digital, said means of computation performing, in the course of each of the said iterations, the algorithm of the form

3. The converter according to claim 1, in which the said input signals are digital and the said output signals are analogue, said means of computation performing, in the course of each of the said iterations, the algorithm of the form ##EQU3## in which V_x.sbsb.(i) is the intermediate voltage portion computed in the course of the previous iteration i, V_x.sbsb.(i+1) is the intermediate voltage portion to be obtained during the iteration i+1 in progress, b_i is the computed ternary value -1, 0 or +1 and V_r is the reference voltage,

said converter further comprising holding means for retaining the cumulated voltage obtained in the course of a cycle of previous iterations during the execution of a cycle of iterations until the latter is completed so as to deliver the successive samples of the analogue voltage to be obtained.

4. Converter according to any one of claims 1 to 3, wherein the non-inverting input of the said operational amplifier is connected to earth.

5. A device for the digital processing of an analogue input signal required to be restored in the form of an analogue output signal comprising:

a first converter comprising an analog input to which said analogue input signal is applied and a first digital output,

a digital processing unit having a first digital input connected to said first digital output of said first converter and a second digital output, and

a second converter comprising a second digital input connected to said second digital output of said digital processing circuit and an analogue output for delivering said analogue output signal,

said first converter implementing a first conversion algorithm with three decision ranges involving ternary digital values b_i with b_i =1, 0, or -1, and comprising

a first unipolar reference voltage source for generating a first reference voltage,

first computation means for, in the course of each of the iterations of a first sequence of successive iterations of said first algorithm, determining a first voltage value formed by the sum of a value determined on the basis of the voltage computed in the previous iteration of said first algorithm and of a value which is the product of the ternary value obtained in the course of the previous iteration of said first algorithm and of said first reference voltage, said first computation means comprising a first plurality of switched capacitances and a first single operational amplifier cooperating with said first plurality of switched capacitors for delivering said first voltage value in each of the said iterations of said first algorithm,

said first converter also comprising;

first generator means for producing, from the successive values of said first voltage value computed during said sequence of iterations of said first algorithm, successive first samples representing, a converted form of said analogue input signal as represented by said first digital output,

said first plurality of switched capacitances of said first computation means being connected in a unilateral arrangement in combination with said first single operational amplifier, one of the inputs of the said first operational amplifier being connected to a first fixed potential,

and said first reference source providing said first unipolar reference voltage referenced to the said first fixed potential;

said second converter implementing a second conversion algorithm with three decision ranges involving ternary digital values bi with b_i =1, 0, or -1, and comprising

a second reference voltage source for generating a second reference voltage,

second computation means for, in the course of each of the iterations of a second sequence of successive iterations of the said second algorithm, determining a second voltage value formed by the sum of a value determined on the basis of the voltage computed in the previous iteration of said second algorithm and of a value which is the product of the ternary value obtained in the course of the previous iteration of said second algorithm and of the said second reference voltage, said second computation means comprising a second plurality of switched capacitances and a second single operational amplifier cooperating with said second plurality of operational amplifiers for delivering said second voltage value in each of the said iterations of said second algorithm,

said second converter also comprising;

second generator means for producing, from the successive values of said second voltage value computed during the said second sequence of iterations of said second algorithm, successive second samples representing, a converted form of said second digital input as represented by said first digital output,

said second plurality of switched capacitances of said second computation means being connected in an unilateral arrangement in combination with said second single operational amplifier, one of the inputs of the said second operational amplifier being connected to a second fixed potential,

and said second reference source providing said second unipolar reference voltage referenced to the said second fixed potential.

6. Device according to claim 5, constituting a hearing aid, wherein said analog input signal is a sound signal and said processing circuit is so arranged as to adapt said sound signal as represented by said first digital output to physiological properties of a patient.

7. Device according to claim 5, wherein said first algorithm performed in the course of each of the said first iterations, by said first computation means has the form

8. A device as claimed in claim 5, wherein said second computation means perform, in the course of each of the said iterations, said second algorithm of the form ##EQU4## in which V_y.sbsb.(i) is the intermediate voltage portion computed in the course of the previous iteration i, V_y.sbsb.(i+1) is the intermediate voltage portion to be obtained during the iteration i+1 in progress, b_i is the computed ternary value -1, 0 or +1 and V_s is the second reference voltage,

said second converter further comprising holding means for retaining the cumulated voltage obtained in the course of a cycle of previous iterations during the execution of a cycle of iterations until the latter is completed so as to deliver the successive samples of said analogue output signal to be obtained.

9. A converter for converting an input signal into an output signal representing said input signal with a relative precision, the converter implementing a conversion algorithm with three decision ranges involving ternary digital values b_i with b_i =1, 0, or -1, and comprising a unipolar reference voltage source, means of computation for, in the course of each of the iterations of a sequence of successive iterations of said algorithm, determining a voltage value formed by the sum of a value determined on the basis of the voltage computed in the previous iteration and of a value which is the product of the ternary value obtained in the course of the previous iteration and of said reference voltage, said means of computation comprising for this purpose a unilateral arrangement of a plurality of switched capacitances and a single operational amplifier cooperating with said switched capacitors for delivering said voltage value in each of said iterations, said converter also comprising generator means for producing, from the successive voltage values computed during said sequence of iterations, successive samples representing, in converted form, said input signal, one of the inputs of said operational amplifier being connected to a fixed potential, said reference source providing a unipolar reference voltage referenced to said fixed potential, wherein said generator means comprise two comparators, in each of which one of the comparison inputs is connected to a capacitor charged via a control signal triggering the comparison operation in the respective comparator, these capacitors being earthed.

10. A converter for converting an input signal into an output signal representing said input signal with a relative precision, the converter implementing a conversion algorithm with three decision ranges involving ternary digital values b_i with b_i =1, 0, or -1, and comprising a unipolar reference voltage source, means of computation for, in the course of each of the iterations of a sequence of successive iterations of said algorithm, determining a voltage value formed by the sum of a value determined on the basis of the voltage computed in the previous iteration and of a value which is the product of the ternary value obtained in the course of the previous iteration and of said reference voltage, said means of computation comprising for this purpose a unilateral arrangement of a plurality of switched capacitances and a single operational amplifier cooperating with said switched capacitors for delivering said voltage value in each of said iterations, said converter also comprising generator means for producing, from the successive voltage values computed during said sequence of iterations, successive samples representing, in converted form, said input signal, one of the inputs of said operational amplifier being connected to a fixed potential, said reference source providing a unipolar reference voltage referenced to said fixed potential, wherein the non-inverting input of said operational amplifier is connected to earth, and said generator means includes two comparators, in each of which one of the comparison inputs is connected to a capacitor charged via a control signal triggering the comparison operation in the respective comparator, these capacitors being earthed.