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Monitoring wafer temperature during thermal processing of wafers by measuring sheet resistance of a test wafer

  • US 6,033,922 A
  • Filed: 07/28/1999
  • Issued: 03/07/2000
  • Est. Priority Date: 12/19/1997
  • Status: Expired due to Fees
First Claim
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1. A test wafer that is included with a lot of product wafers during thermal processing of the product wafers to determine a product wafer temperature achieved at the product wafers during the thermal processing of the product wafers, the test wafer comprising:

  • a lightly doped silicon wafer having a bare sheet resistance of 10 Ω

    /square to 40 Ω

    /square; and

    a layer of titanium deposited on the lightly doped silicon wafer after the lightly doped silicon wafer is precleaned, the layer of titanium having a predetermined thickness such that an initial sheet resistance measured on top of the layer of titanium is 6.3±

    0.2 Ω

    /square, and wherein a measurement of the initial sheet resistance at a plurality of locations on the test wafer results in a standard deviation that is less than 1% of a mean of the measurement of the initial sheet resistance at the plurality of locations.

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