System for packing variable length instructions into fixed length blocks with indications of instruction beginning, ending, and offset within block
First Claim
1. A method for packing one or more variable length sequences of instructions into a sequence of fixed length blocks, wherein each block contains a fixed number of sequential data words, wherein each instruction sequence is contained in a contiguous sequence of data words of a contiguous sequence of one or more data blocks, said method comprising the steps of:
- (a) storing a plurality of blocks in a queue wherein blocks of a contiguous sequence of blocks that contain an instruction sequence are stored in contiguous and sequential adjacent entries, for each of said blocks stored in said queue;
(b) storing a first indication that indicates whether or not said block contains an initial data word of an instruction sequence, and if so, also storing a first offset indicating which data word of said block is said initial data word of said instruction sequence, and(c) storing a second indication that indicates whether or not said block contains a last data word of an instruction sequence, and a second offset indicating which data word of said block is said last data word of said instruction sequence or a last data word contained in said block,(d) in response to said first indication, said second indication, said first offset and said second offset, of a head block at a head of said queue, and in response to said second offset of a following block following said block at said head of said queue, sequentially concatenating said data words of each sequence of instructions to form a contiguous subsequence of data words for each sequence of instructions.
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Abstract
A processor architecture is disclosed including a fetcher, packet unit and branch target buffer. The branch target buffer is provided with a tag RAM that is organized in a set associative fashion. In response to receiving a search address, multiple sets in the tag RAM are simultaneously searched for a branch instruction that is predicted to be taken. The packet unit has a queue into which fetched cache blocks are stored containing instructions. Sequentially fetched cache blocks are stored in adjacent locations of the queue. The queue entries also have indicators that indicate whether or not a starting or final data word of an instruction sequence is contained in the queue entry and if so, an offset indicating the particular starting or final data word. In response, the packet unit concatenates data words of an instruction sequence into contiguous blocks. The fetcher generates a fetch address for fetching a cache block from the instruction cache containing instructions to be executed. The fetcher also generates a search address for output to the branch target buffer. In response to the branch target buffer detecting a taken branch that crosses multiple cache blocks, the fetch address is increased so that it points to the next cache block to be fetched but the search address is maintained the same.
61 Citations
7 Claims
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1. A method for packing one or more variable length sequences of instructions into a sequence of fixed length blocks, wherein each block contains a fixed number of sequential data words, wherein each instruction sequence is contained in a contiguous sequence of data words of a contiguous sequence of one or more data blocks, said method comprising the steps of:
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(a) storing a plurality of blocks in a queue wherein blocks of a contiguous sequence of blocks that contain an instruction sequence are stored in contiguous and sequential adjacent entries, for each of said blocks stored in said queue; (b) storing a first indication that indicates whether or not said block contains an initial data word of an instruction sequence, and if so, also storing a first offset indicating which data word of said block is said initial data word of said instruction sequence, and (c) storing a second indication that indicates whether or not said block contains a last data word of an instruction sequence, and a second offset indicating which data word of said block is said last data word of said instruction sequence or a last data word contained in said block, (d) in response to said first indication, said second indication, said first offset and said second offset, of a head block at a head of said queue, and in response to said second offset of a following block following said block at said head of said queue, sequentially concatenating said data words of each sequence of instructions to form a contiguous subsequence of data words for each sequence of instructions. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A packet unit for packing one or more variable length sequences of instructions into a sequence of fixed length blocks, wherein each block contains a fixed number of sequential data words, wherein each instruction sequence is contained in a contiguous sequence of data words of a contiguous sequence of one or more data blocks, said packet unit comprising:
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a queue configured to store a plurality of blocks wherein blocks of a contiguous sequence of blocks that contain an instruction sequence are stored in contiguous and sequential adjacent entries, said queue also configured to store for each of said entries; a first indication that indicates whether or not said block contains an initial data word of an instruction sequence, a first offset indicating which data word of said block is said initial data word of said instruction sequence, a second indication that indicates whether or not said block contains a last data word of an instruction sequence, and a second offset indicating which data word of said block is said last data word of said instruction sequence, and an aligner which, in response to said first indication, said second indication, said first offset and said second offset, of a head block at a head of said queue, and in response to said second offset of a following block following said block at said head of said queue, sequentially concatenates said data words of each sequence of instructions to form a contiguous subsequence of data words for each sequence of instructions.
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Specification