Large area low mass IR pixel having tailored cross section
DCFirst Claim
1. A microstructure for use as a pixel in a pixel array, comprising:
- a plurality of connection pads structurally connected to a substrate, the connection pads further providing electrical connection to a pixel control circuit on the substrate;
a support structure structurally and electrically attached to the plurality of connection pads and extending from the connection pads, the support structure situated above the substrate and having a predetermined cross-sectional height;
a thermally isolated area structurally and electrically attached to the support structure, the thermally isolated area also situated above the substrate and having the predetermined cross-sectional height; and
a responsive area attached to the thermally isolated area and substantially filling the remainder of the pixel area, the fill area having a reduced cross-sectional height, wherein the reduced cross-sectional height is less than the predetermined cross-sectional height.
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Abstract
The present invention provides a much more optimum design for an infrared pixel microstructure. The configuration of the microstructure itself is designed to optimum operational characteristics including faster speeds than previously available. These faster speeds are achieved by reducing the thermal mass of the pixel itself, thus directly affecting the pixels associated thermal time constant. Thermal mass is reduced by tailoring the cross section of the pixel structure such that protective layers are substantially reduced in areas where they are not necessary. This results in the desired reduction and overall pixel mass and consequently more optimum pixel performance.
41 Citations
13 Claims
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1. A microstructure for use as a pixel in a pixel array, comprising:
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a plurality of connection pads structurally connected to a substrate, the connection pads further providing electrical connection to a pixel control circuit on the substrate; a support structure structurally and electrically attached to the plurality of connection pads and extending from the connection pads, the support structure situated above the substrate and having a predetermined cross-sectional height; a thermally isolated area structurally and electrically attached to the support structure, the thermally isolated area also situated above the substrate and having the predetermined cross-sectional height; and a responsive area attached to the thermally isolated area and substantially filling the remainder of the pixel area, the fill area having a reduced cross-sectional height, wherein the reduced cross-sectional height is less than the predetermined cross-sectional height. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A microstructure pixel for use in a pixel array, comprising:
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a first connection pad and an second connection pad, each connection pad electrically connectable to a pixel control circuit; a first resistor leg attached to the first connection pad and extending to a first predetermined location within the pixel, the first resistor leg having a predetermined resistor height a second resistor leg attached to the second connection pad and extending to a second predetermined location within the pixel, the second resistor leg also being of the predetermined resistor height; a resistor path attached to the first resistor leg at the first predetermined location and attached to the second resistor leg at the second predetermined location, the resistor path extending between the first predetermined location and the second predetermined location, the resistor path also being of the predetermined resistor height; and a reduced height responsive region filling substantially the remainder of the pixel, the reduced height responsive region having a predetermined second height, the predetermined second height being less than the predetermined resistor height. - View Dependent Claims (10, 11, 12, 13)
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Specification