Optical processor based imaging system

• US 6,069,365 A
• Filed: 05/14/1999
• Issued: 05/30/2000
• Est. Priority Date: 11/25/1997
• Status: Expired due to Fees

• Current Assignee: Alan Y. Chow
• Original Assignee: Alan Y. Chow
• Inventors: Chow, Alan Y., Chow, Vincent Y.
• Primary Examiner(s): LE, QUE TAN
• Application Number:
  US09/312,249
• Time in Patent Office: 382 Days
• Field of Search: 250/551, 250/214 LS, 250/208.1, 250/214 R, 250/214.1, 359/152, 359/149, 359/154, 348/222, 348/294, 348/311
• US Class Current: 250/551
• CPC Class Codes: H04B 10/032 using working and protection systems H04J14/0287 takes precedence
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors

Abstract

An image processing system for capturing and compressing images into a digital format is disclosed. The system has an array of imaging pixel elements which consist of two photodiode detectors. One photodiode detector is a capture detector while the other detector is a reference detector. The capture detector has an anode electrically coupled to the cathode of the reference detector. The cathode of the capture detector is electrically coupled to the anode of the reference detector. An image may be compared to a reference image detected by the reference detector. Different levels of light between the captured image and the reference image change the electrical output of the opsistor. Image compression is facilitated since only pixel elements which change from frame to frame need be stored. Additionally, a processing and compression circuit may use column and row scans to eliminate unchanged pixels and store only pixels with different light levels between images.

Claims

1. An image processing array for comparing light levels from different image sources, the array comprising multiple pixel elements, each pixel element having:

a first photo detector having an anode and a cathode, the first detector in exposure to a light level from a first image source; and

a second photo detector having an anode, and a cathode, the second detector in exposure to a light level from a second image source, the anode of the second detector being electrically coupled to the cathode of the first photo detector, and the cathode of the second detector being electrically coupled to the anode of the first detector.

2. The image processing array of claim 1 wherein the first and second photo detectors comprise photodiodes.

3. The image processing array of claim 1 wherein the anode of the first detector and the cathode of the second detector are coupled to a common voltage reference.

4. The image processing array of claim 1 further comprising an infra-red waveband filter between the first detector and the first image source.

5. The image processing array of claim 1 further comprising an ultra-violet waveband filter between the first detector and the first image source.

6. The imaging processing array of claim 1 further comprising:

a filter passing light at a first waveband between the first detector and the first image source; and

wherein each pixel element further comprises;

a third photo detector having an anode, a cathode, the third photo detector in exposure to the first image source;

a fourth photo detector having an anode, a cathode, the fourth photo detector in exposure to the second image source, the anode of the fourth photo detector being electrically coupled to the cathode of the third photo detector, and the cathode of the fourth photo detector being electrically coupled to the anode of the third photo detector;

a second filter for light at a second waveband between the third photo detector and the first image source;

a fifth photo detector having an anode, a cathode, the fifth photo detector in exposure to the first image source;

a sixth photo detector having an anode, a cathode, the sixth photo detector in exposure to the second image source, the anode of the sixth photo detector being electrically coupled to the cathode of the fifth photo detector, and cathode of the sixth photo detector being electrically coupled to the anode of the fifth photo detector; and

a third filter for light at a third waveband between the fifth photo detector and the first image source.

7. The image processing system of claim 6 wherein the first waveband is the red spectrum of visible light;

the second waveband is the green spectrum of visible light; and

the third waveband is the blue spectrum of visible light.

8. The image processing system of claim 1 wherein the first image source is an image to be captured and the second image source is a stored reference image.

9. The image processing system of claim 1 wherein the image array is fabricated on a monolithic substrate having a front and rear surface.

10. An image processing system for capturing an image source, the system comprising:

an image array having at least one pixel element, the at least one pixel element having;

capture photo detector having an anode and a cathode, the capture photo detector in exposure to the image source;

a reference photo detector having an anode, a cathode, the anode of the reference detector being electrically coupled to the cathode of the capture photo detector, and cathode of the reference detector being electrically coupled to the anode of the capture detector; and

a light emitter array having at least one light emitter for each pixel element, wherein the light emitter emits light on the reference detector.

11. The imaging system of claim 10 wherein the light emitters are light emitting diodes.

12. An image processing system for capturing an image source, the system comprising:

a front substrate having a front and rear surface;

an image array having multiple pixel elements fabricated on the front surface of the front substrate, each pixel element having a capture photo detector having an anode and a cathode, the capture photo detector in exposure to the image source;

a rear substrate having a rear surface;

a reference photo detector fabricated on the rear surface of the rear substrate, the reference photo detector having an anode and a cathode, the anode of the reference detector being electrically coupled to the cathode of the capture photo detector of a selected pixel element, and cathode of the reference detector being electrically coupled to the anode of the capture detector of the selected pixel element;

a middle substrate between the front substrate and the rear substrate with a processing circuit electrically coupled to each pixel element and corresponding reference detector.

13. The image processing system of claim 12 wherein the processing circuit includes a difference circuit for each pixel element, the difference circuit producing a difference signal indicative of the difference between a reference image projected on the reference photo detector and the image sensed by the capture photo detector.

14. The image processing system of claim 13 further comprising an analog to digital converter coupled to the processing circuit, producing a digital value of the difference signal.

15. The image processing system of claim 14 further companies

a storage device coupled to the processing circuit which stores a digital representation of a series of images and forms digital representations of the series of images.

16. The image processing system of claim 12 wherein the anode of the capture detector and the cathode of the reference detector are coupled to a common voltage reference.

17. The image processing system of claim 12 wherein the front and rear substrates are N-type silicon,

wherein the anode of the capture detector is a P+ doped region formed on the front surface of the front substrate;

wherein the cathode of the capture detector is an N+ doped region on the rear surface of the front substrate opposite the P+ doped region of the capture detector;

wherein the anode of the reference detector is a P+ doped region formed on the rear surface of the rear substrate; and

wherein the anode of the reference detector is a N+ doped region on the front surface of the rear substrate opposite the P+ doped region of the reference detector.

18. The image processing system of claim 17 further comprising:

a front conductor layer in contact with the P+ doped region of the capture detector of each pixel element; and

a rear conductor layer in contact with the P+ doped region of the reference detector of each pixel element.

19. The image processing system of claim 17 further comprising:

a series of front bumps located between the rear surface of the front substrate and the middle substrate;

a series of rear bumps located between the front surface of the rear substrate and the middle substrate;

a series of conductive vias running through the middle substrate electrically coupling each rear bump with a front bump; and

wherein a front bump is in electrical contact with the N+ doped region of the capture detector and a rear bump is in electrical contact with the P+ doped region of the reference detector.

20. The image processing system of claim 19 further comprising:

an emitter substrate having a light emitter array fabricated thereon for projecting the reference image; and

an aperture grid located between the emitter substrate and the rear surface of the rear substrate, wherein the aperture grid provides optical isolation between adjacent light emitters and the reference detector of each pixel element.