Interleaved zero current switching in a power factor correction boost converter

• US 6,091,233 A
• Filed: 01/14/1999
• Issued: 07/18/2000
• Est. Priority Date: 01/14/1999
• Status: Expired due to Term

• Current Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Original Assignee: Micro Linear Corporation (Qorvo, Inc.)
• Inventors: Li, Thomas, Hwang, Jeffrey
• Primary Examiner(s): NGUYEN, MATTHEW VAN
• Application Number:
  US09/231,523
• Time in Patent Office: 551 Days
• Field of Search: 323/222, 323/223, 323/225, 323/266, 323/282, 363/84, 363/89, 363/90, 363/125, 363/127
• US Class Current: 323/222
• CPC Class Codes: H02M 1/4258 using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage H02M1/4241 takes precedence
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
• CPC Class Codes: Y02P 80/10 Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Abstract

A method and apparatus for interleaving switching of multiple transistor switches in a power factor correction (PFC) boost converter and for timing the switching to occur when a current through a freewheeling diode corresponding to each switch is at a minimum level. The converter draws input current from an alternating current power supply for forming a regulated output voltage. A controller senses an input current and an output voltage across an output capacitor for controlling switching to regulate the output voltage and to ensure that the input current is substantially in phase with an input voltage. Current through a first inductor associated with a first switch is allowed to fall substantially to zero upon discharging the first inductor prior to re-charging the first inductor. Charging of a second inductor associated with a second switch, however, is initiated prior to completion of discharging the first inductor. Similarly, current through the second inductor is allowed to fall substantially to zero prior to re-charging the second inductor. An advantage is that from the perspective of the power supply, the converter operates in continuous conduction mode, while from the perspective of each of the switches, the converter operates in discontinuous conduction mode. The invention reduces power dissipated in the switches, increasing reliability and allowing higher frequency operation. In accordance with another aspect of the invention, a synchronizing signal is generated by the PFC converter for synchronizing operation of a second converter, such as a pulse-width modulation converter, with the PFC converter.

Claims

1. A controller for a power factor correction boost converter comprising:

a. first means for controlling charging of a first inductor with energy from an alternating-current power supply and for controlling discharging of the first inductor into an output capacitor wherein the first means operates in accordance with a first clock signal;

b. second means for controlling charging of a second inductor with energy from the power supply and for controlling discharging of the second inductor into the output capacitor wherein the second means operates in accordance with a second clock signal and wherein the second means is coupled to the first means; and

c. means for forming a synchronizing output signal for synchronizing operation of a pulse width modulation converter with the power factor correction boost converter wherein the synchronizing output signal is synchronous with at least one of the first clock signal and the second clock signal.

2. The controller according to claim 1 wherein a current provided by the power supply is maintained substantially in phase with a voltage provided by the power supply.

3. The controller according to claim 1 wherein the first means is also for re-charging the first inductor and wherein a current through the first inductor falls to zero during discharging the first inductor before the first means initiates re-charging the first inductor.

4. The controller according to claim 1 wherein the first inductor and the second inductor are wound about a same inductor core.

5. The controller according to claim 1 wherein the first clock signal and the second clock signal differ in phase by approximately 180 degrees.

6. The controller according to claim 1 wherein the second means initiates charging of the second inductor while the first means is discharging the first inductor.

7. The controller in accordance with claim 1 wherein the first means compares a signal representative a voltage across the output capacitor to a signal representative of a current drawn by the power factor correction boost converter for controlling timing for charging and discharging the first inductor.

8. The controller in accordance with claim 7 wherein the current drawn by the power factor correction boost converter is sensed as a voltage across a sensing resistor.

9. The controller in accordance with claim 8 wherein a voltage dropping diode is arranged to adjust a level of voltage sensed across the sensing resistor.

10. A power factor correction boost converter comprising:

a. a first energy storage element for receiving energy from an alternating-current power supply;

b. a first switch coupled to the first energy storage element wherein the first switch is selectively conditioned open or closed and wherein when the first switch is closed, energy is transferred from the power supply to the first energy storage element;

c. a second energy storage element for receiving energy from the power supply;

p1 d. a second switch coupled to the second energy storage element wherein the second switch is selectively conditioned open or closed and wherein when the second switch is closed, energy is transferred from the power supply to the second energy storage element; and

e. a third energy storage element coupled to the first switch and to the second switch, wherein when the first switch is opened, energy is transferred from the first energy storage element to the third energy storage element and wherein when the second switch is open, energy is transferred from the second energy storage element to the third energy storage element; and

f. a controller coupled to the first switch and to the second switch wherein the controller senses a current provided by the power supply for controlling switching.

11. The power factor correction boost converter according to claim 10 wherein the first energy storage element is a first inductor, the second energy storage element is a second inductor and the third energy storage element is a capacitor.

12. The controller in accordance with claim 11 wherein the current provided by the power supply is substantially equal to a sum of a first current which flows through the first energy storage element and a second current which flows through the second energy storage element.

13. The power factor correction boost converter according to claim 12 wherein the first current recurrently rises above zero and then falls substantially to zero.

14. The power factor correction boost converter according to claim 13 wherein the first switch is opened and closed recurrently and wherein the first current falls substantially to zero after the first switch is opened and before the first switch is closed.

15. The power factor correction boost converter according to claim 14 wherein the second current recurrently rises above zero and then falls substantially to zero.

16. The power factor correction boost converter according to claim 14 wherein the sum of the first current and the second current remains above zero throughout a complete cycle of opening and closing the first switch.

17. The power factor correction boost converter according to claim 16 wherein the second current recurrently falls substantially to zero.

18. The power factor correction boost converter according to claim 14 wherein the controller senses a voltage formed across the third energy storage element for controlling switching.

19. The power factor correction boost converter according to claim 14 wherein the second switch is opened and closed recurrently and wherein the second current falls substantially to zero after the second switch is opened and before the second switch is closed.

20. The power factor correction boost converter according to claim 19 wherein a sum of the first current and a sum of the second current remains above zero throughout a complete cycle of opening and closing each of the first and second switch.

21. The power factor correction boost converter according to claim 20 wherein switching operations for the first switch are interleaved with switching operations of the second switch.

22. The power factor correction boost converter according to claim 20 wherein the first switch is operated in accordance with a first clock signal and wherein the second switch is operated in accordance with a second clock signal and wherein the first clock signal and the second clock signal differ in phase by approximately 180 degrees.

23. The power factor correction boost converter according to claim 22 further comprising a means for forming a synchronizing output signal wherein the synchronizing output signal is synchronous with at least one of the first clock signal and the second clock signal.

24. The power factor correction boost converter according to claim 11 wherein the first inductor and the first switch together form a first energy transfer path between the power supply and the capacitor, and wherein the second inductor and the second switch together form a second energy transfer path between the power supply and the capacitor and further comprising one or more additional energy transfer paths between the power supply and the capacitor, each additional energy transfer path having a respective inductor and a respective switch.

25. The power factor correction boost converter according to claim 24 wherein a second current flows through the second inductor and wherein an additional current flows through each inductor of the one or more additional energy paths and wherein a sum of the first current, the second current and the additional current through each inductor remains above zero throughout a complete cycle of opening and closing the first switch.

26. A controller for a power factor correction boost converter comprising:

a. first means for controlling charging of a first inductor with energy from an alternating-current power supply and for controlling discharging of the first inductor into an output capacitor; and

b. second means for controlling charging of a second inductor with energy from the power supply and for controlling discharging of the second inductor into the output capacitor wherein the first means and the second means are responsive to a sensing signal representative of a level of current drawn by the power factor correction boost converter.

27. The controller in accordance with claim 26 wherein the current drawn by the power factor correction boost converter is maintained substantially in phase with a voltage provided by the power supply.

28. The controller in accordance with claim 26 wherein the first means is also for controlling re-charging of the first inductor and wherein a current through the first inductor falls to zero during discharging the first inductor before the first means initiates re-charging the first inductor.

29. The controller in accordance with claim 26 wherein the first inductor and the second inductor are wound about a same inductor core.

30. The controller in accordance with claim 26 wherein the first means operates in accordance with a first clock signal and the second means operates in accordance with a second clock signal wherein the first clock signal and the second clock signal differ in phase by approximately 180 degrees.

31. The controller in accordance with claim 26 wherein the second means initiates charging of the second inductor while the first means is discharging the first inductor.

32. The controller in accordance with claim 26 wherein the first means compares a signal representative a voltage across the output capacitor to a signal representative of a current drawn by the power factor correction boost converter for controlling timing for charging and discharging the first inductor.

33. The controller in accordance with claim 32 wherein the current drawn by the power factor correction boost converter is sensed as a voltage across a sensing resistor.

34. The controller in accordance with claim 33 wherein a voltage dropping diode is arranged to adjust a level of voltage sensed across the sensing resistor.

35. A controller for power factor correction boost converter comprising:

a. first means for controlling charging of a first inductor with energy from an alternating-current power supply and for controlling discharging of the first inductor into an output capacitor wherein the first means is responsive to a first ramp signal and wherein a rate at which the first ramp signal rises is representative of a voltage across the capacitor; and

b. second means for controlling charging of a second inductor with energy from the power supply and for controlling discharging of the second inductor into the output capacitor wherein the second means is responsive to a second ramp signal and wherein a rate at which the second ramp signal rises is representative of a voltage across the output capacitor.

36. The controller in accordance with claim 35 wherein the current drawn by the power factor correction boost converter is maintained substantially in phase with a voltage provided by the power supply.

37. The controller in accordance with claim 35 wherein the first means is also for controlling re-charging of the first inductor and wherein a current through the first inductor falls to zero during discharging the first inductor before the first means initiates re-charging the first inductor.

38. The controller in accordance with claim 35 wherein the first inductor and the second inductor are wound about a same inductor core.

39. The controller in accordance with claim 35 wherein the first means operates in accordance with a first clock signal and the second means operates in accordance with a second clock signal wherein the first clock signal and the second clock signal differ in phase by approximately 180 degrees.

40. The controller in accordance with claim 35 wherein the second means initiates charging of the second inductor while the first means is discharging the first inductor.

41. The controller in accordance with claim 35 wherein the first means compares a signal representative a voltage across the output capacitor to a signal representative of a current drawn by the power factor correction boost converter for controlling timing for charging and discharging the first inductor.

42. The controller in accordance with claim 41 wherein the current drawn by the power factor correction boost converter is sensed as a voltage across a sensing resistor.

43. The controller in accordance with claim 42 wherein a voltage dropping diode is arranged to adjust a level of voltage sensed across the sensing resistor.

44. A method of performing power factor correction in a boost converter, the method comprising steps of:

a. charging a first inductor with energy from an alternating-current power supply;

b. discharging the first inductor into an output capacitor;

c. forming a first ramp signal wherein a rate at which the first ramp signal rises is representative of a voltage across the output capacitor;

d. charging a second inductor with energy from the power supply wherein the step of charging the second inductor is initiated prior to completion of the step of discharging the first inductor;

e. forming a second ramp signal wherein a rate at which the second ramp signal rises is representative of a voltage across the output capacitor; and

f. discharging the second inductor into the output capacitor.

45. The method in accordance with claim 44 wherein a current provided by the power supply is maintained substantially in phase with a voltage provided by the power supply.

46. The method in accordance with claim 44 wherein the first means compares a signal representative a voltage across the output capacitor to a signal representative of a current drawn by the power factor correction boost converter for controlling timing for charging and discharging the first inductor.

47. A method of performing power factor correction in a boost converter, the method comprising steps of:

a. charging a first inductor with energy from an alternating-current power supply;

b. discharging the first inductor into an output capacitor;

c. charging a second inductor with energy from the power supply wherein the step of charging the second inductor is initiated prior to completion of the step of discharging the first inductor;

d. discharging the second inductor into the output capacitor; and

e. sensing a voltage across the output capacitor and a combined current drawn from the power supply through the first and second inductors for controlling timing for performing the steps a.-d..

48. The method in accordance with claim 47 wherein the first means compares a signal representative a voltage across the output capacitor to a signal representative of a current drawn by the power factor correction boost converter for controlling timing for charging and discharging the first inductor.