InP-based HEMT with superlattice carrier supply layer

• US 6,100,542 A
• Filed: 11/19/1997
• Issued: 08/08/2000
• Est. Priority Date: 11/19/1996
• Status: Expired due to Term

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Taguchi, Takashi, Hoshino, Koichi, Kohara, Teruaki
• Primary Examiner(s): Guay, John
• Application Number:
  US08/974,731
• Time in Patent Office: 993 Days
• Field of Search: 257/20, 257/194
• US Class Current: 257/20
• CPC Class Codes: H01L 29/155 Comprising only semiconductor materials H01L29/154 takes precedence
• CPC Class Codes: H01L 29/7783 using III-V semiconductor material

Abstract

A semiconductor device includes a semi-insulating substrate. A channel layer is formed on the semi-insulating substrate. An electron supply layer is formed on the semi-insulating substrate for generating a two-dimensional electron gas. The electron supply layer includes a doped superlattice layer. The superlattice layer includes layers of In_X Al_1-X As and layers of In_Y Al_1-Y As which alternate with each other, where 0≦X≦1.0 and 0≦Y≦1.0, and X differs from Y.

Claims

1. A semiconductor device comprising:

a semi-insulating substrate made of InP;

a channel layer formed on the semi-insulating substrate; and

an electron supply layer formed on the semi-insulating substrate for generating a two-dimensional electron gas, the electron supply layer including a doped superlattice layer the superlattice layer including layers of In_X Al_1-X As and layers of In_Y Al_1-Y As which alternate with each other, where X>

0.52>

Y, the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As being grown with respect to In₀.52 Al₀.48 As.

2. A semiconductor device as recited in claim 1, wherein one of X and Y is equal to or smaller than 0.52, and the other of X and Y is equal to or greater than 0.52.

3. A semiconductor device as recited in claim 1, wherein the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As have thicknesses equal to or smaller than critical thicknesses to prevent dislocation from being caused by lattice mismatching.

4. A semiconductor device as recited in claim 1, wherein one of X and Y is equal to 0.8, and the other of X and Y is equal to 0.2.

5. A semiconductor device as recited in claim 4, wherein the layers of In₀.8 Al₀.2 As and the layers of In₀.2 Al₀.8 As have thicknesses each equal to about 2 nm, and the layers of In₀.8 Al₀.2 As and the layers of In₀.2 Al₀.8 As form about five periods of the alternation.

6. A semiconductor device as recited in claim 1, wherein ones of the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As which relate to a greater of X and Y are doped, and the other ones of the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As are non-doped.

7. A semiconductor device as recited in claim 1, wherein the electron supply layer includes a δ

-doped layer which enables impurities to be locally located.

8. A semiconductor device as recited in claim 1, further comprising a non-doped spacer layer of In_Z Al_1-Z As located between the channel layer and the electron supply layer, where 0≦

Z≦

0.52.

9. A semiconductor device as recited in claim 8, wherein Z is equal to 0.52, and the spacer layer has a thickness of 5 nm.

10. A semiconductor device as recited in claim 8, wherein the channel layer is made of non-doped In_T Ga_1-T As, where 0.53≦

T≦

1, and wherein the channel layer is greater in electron affinity than the spacer layer.

11. A semiconductor device as recited in claim 10, wherein the channel layer includes a layer of In₀.53 Ga₀.47 As and a layer of In₀.8 Ga₀.2 As, the layer of In₀.53 Ga₀.47 As being closer to the spacer layer and having a thickness of 4 nm, the layer of In₀.8 Ga₀.2 As being in contact with the layer of In₀.53 Ga₀.47 As and having a thickness of 16 nm.

12. A semiconductor device as recited in claim 1, wherein the electron supply layer is located between the semi-insulating substrate and the channel layer.

13. A semiconductor device as recited in claim 1, wherein the layers of In_X Al_1-X As have a lattice constant aX and the layers of In_Y Al_1-Y As have a lattice constant aY and aX>

aY, and |aX-a0.52|=|aY-a0.52| wherein a0.52 denotes a lattice constant of In₀.52 Al₀.48 As.

14. A semiconductor device as recited in claim 1, wherein X+Y=1, and the layers of In_X Al_1-X As have a thickness corresponding to m monolayers per period and the layers of In_Y Al_1-Y As have a thickness corresponding to n monolayers per period, and m=n≦

2.

15. A semiconductor device comprising:

a semi-insulating substrate made of InP;

a channel layer formed on the semi-insulating substrate; and

an electron supply layer formed on the semi-insulating substrate for generating a two-dimensional electron gas, the electron supply layer including a doped superlattice layer, the superlattice layer including layers of In_X Al_1-X As and layers of In_Y Al_1-Y As which alternate with each other, where X>

0.52>

Y, the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As being grown with respect to In₀.52 Al₀.48 As;

wherein one of X and Y is equal to 1 and the other of X and Y is equal to 0, and the resulting layers of InAs and the layers of AlAs have thicknesses of each corresponding to two monolayers, and the resulting layers of InAs and the layers of AlAs form twenty periods of the alternation or less.

16. A semiconductor device as recited in claim 15, wherein the layers of InAs and the layers of AlAs form seven periods of the alternation.

17. A semiconductor device comprising:

a semi-insulating substrate made of InP;

a channel layer formed on the semi-insulating substrate; and

an electron supply layer formed on the semi-insulating substrate for generating a two-dimensional electron gas, the electron supply layer including a doped superlattice layer, the superlattice layer including layers of In_X Al_1-X As and layers of In_Y Al_1-Y As which alternate with each other, where X>

0.52>

Y, the layers of In_X Al_1-X As and the layers of In_Y Al_1-Y As being grown with respect to In₀.52 Al₀.48 As,

wherein said semiconductor device further comprises a doped layer of In₀.52 Al₀.48 As which is located between the electron supply layer and the channel layer, the layer of In₀.52 Al₀.48 As serving as an electron supply layer.