Method for improving bondability for deep-submicron integrated circuit package
First Claim
1. A method for forming a wire ball bonding surface site on a semiconductor die comprising the steps of:
- providing a semiconductor substrate having a top electically conducting layer, andan overlying layer covering said top electrically conducting layer, anda photoresist applied to said overlying layer;
patterning said photoresist to form an array of submicron size holes;
etching openings through said overlying layer to said top electrically conducting layer, and forming a rough textured surface profile in said top electrically conducting layer through said openings of said overlying layer;
depositing a passivation film over said overlying layer and forming wiring pad windows for wire ball bonding.
1 Assignment
0 Petitions
Accused Products
Abstract
A method is adapted to form wire interconnect pads on integrated circuit devices and includes the steps of providing a semiconductor substrate having an aluminum-copper top metal layer, and a titanium nitride layer covering the aluminum-copper top metal layer, and a photoresist coating applied to the titanium nitride layer. The photoresist coating is partially exposed and partially developed to form openings for etching an array of submicron size holes. Etching through the titanium nitride layer to the aluminum-copper layer, by way of the partially developed photoresist, forms a rough textured surface profile in the array of cavities, with diameters of less than 0.3 um, etched in the aluminum copper layer. After stripping of the photoresist and depositing a passivation film, windows are formed delineating improved bond pads for wire bonding. The textured cavities increase the surface area of the bond pads and provide improved bondability for the 0.35 and 0.3 um IC devices.
20 Citations
9 Claims
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1. A method for forming a wire ball bonding surface site on a semiconductor die comprising the steps of:
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providing a semiconductor substrate having a top electically conducting layer, and an overlying layer covering said top electrically conducting layer, and a photoresist applied to said overlying layer; patterning said photoresist to form an array of submicron size holes; etching openings through said overlying layer to said top electrically conducting layer, and forming a rough textured surface profile in said top electrically conducting layer through said openings of said overlying layer; depositing a passivation film over said overlying layer and forming wiring pad windows for wire ball bonding. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification