High density plasma chemical vapor deposition process

• US 6,117,345 A
• Filed: 10/28/1997
• Issued: 09/12/2000
• Est. Priority Date: 04/02/1997
• Status: Expired due to Term

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Liu, Chih-Chien, Lur, Water, Tseng, Ta-Shan, Wu, Juan-Yuan, Shieh, Wen-Bin, Sun, Shih-Wei
• Primary Examiner(s): SERGENT, RABON A
• Application Number:
  US08/958,460
• Time in Patent Office: 1,050 Days
• Field of Search: 438/695, 438/710, 216/67, 216/19, 216/79, 216/80, 216/75
• US Class Current: 216/19
• CPC Class Codes: H01L 21/02112 characterised by the material of the layer
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0276 using an anti-reflective coating anti-reflective coating for lithography in general G03F7/09
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76837 Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213

Abstract

A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.

Claims

1. A method for forming conducting structures separated by gaps on a substrate, comprising:

providing a substrate and a wiring line layer above the substrate;

forming a first antireflective coating on the wiring line layer;

forming a second antireflective coating on the first antireflective coating, wherein the first antireflective coating and the second antireflective coating are formed from different materials;

forming a mask layer above the second antireflective coating, wherein the mask layer covers selected portions of the second antireflective coating and exposes other portions of the second antireflective coating;

etching the first antireflective coating, the second antireflective coating, and the wiring line layer, at the location where the second antireflective coating is exposed by the mask layer, to form wiring lines separated by gaps; and

depositing a dielectric material within the gaps to fill the gaps, using high density plasma chemical vapor deposition.

2. The method of claim 1, wherein the first antireflective coating works by absorption and the second antireflective coating works by interference.

3. The method of claim 1, wherein the mask layer is a patterned photoresist layer.

4. The method of claim 1, wherein a portion of the second antireflective coating is etched during the high density plasma chemical vapor deposition.

5. The method of claim 1, further comprising the formation of a surface layer between the substrate and the wiring line layer, the surface layer being a barrier between the substrate and wiring line layer.

6. The method of claim 1, further comprising the step of removing the second antireflective coating after the deposition of a dielectric material within the gaps.

7. The method of claim 1, wherein part of the second antireflective coating is removed and remaining portions of the second antireflective coating act as a mask during the etching of the first antireflective coating and the wiring line layer.

8. The method of claim 1, wherein after etching each wiring line has a portion of the second antireflection coating thereon, the portion of second antireflection coating on each wiring line having a cross-sectional shape selected from the group consisting of a rectangle, a triangle, a trapezoid, and a rectangle having its upper corners etched away.

9. A method for forming conducting structures separated by gaps on a substrate, comprising:

providing a substrate and a wiring line layer above the substrate;

forming a cap layer above the wiring line layer;

forming a mask layer above the cap layer, wherein the mark layer covers selected portions of the cap layer and exposes other portions of the cap layer;

etching the cap layer, and the wiring line layer, at the locations where the cap layer is exposed by the mask layer, to form wiring lines separated by gaps, the wiring lines having a remaining portion of the cap layer thereon; and

depositing a dielectric material within the gaps at a sputtering rate sufficient to fill the gaps, using high density plasma chemical vapor deposition.

10. The method of claim 9, wherein the cap layer is used as a hard mask during etching of the wiring line layer.

11. The method of claim 9, wherein the cap layer is an antireflective coating.

12. The method of claim 9, wherein the remaining portion of the cap layer is partially etched during the deposition of a dielectric material using high density plasma chemical vapor deposition.

13. The method of claim 9, wherein the cap layer comprises a material selected from the group consisting of a silicon nitride material and an oxynitride material.

14. The method of claim 9, wherein the remaining portion of the cap layer on at least one wiring line has a rectangular shape in cross section.

15. The method of claim 9, wherein the remaining portion of the cap layer on at least one wiring line has a trapezoidal shape in cross section.

16. The method of claim 15, wherein the trapezoidal shape includes top and bottom surfaces parallel to one another and side surfaces that extend inwardly from the bottom surface to the top surface.

17. The method of claim 9, wherein the remaining portion of the cap layer on at least one wiring line has a triangular shape in cross section.

18. The method of claim 9, wherein the remaining portion of the cap layer on at least one wiring line has, in cross section, a rectangular shape having its upper comers etched away.

19. The method of claim 9, wherein the remaining portion of the cap layer is partially etched and redeposited into the gaps during the high density plasma chemical vapor deposition process.

20. The method of claim 9, wherein the mask layer is a patterned photoresist layer.

21. A method for forming conducting structures separated by gaps filled with dielectric material, comprising the steps of:

providing a substrate containing silicon, the substrate having a surface;

forming a surface layer comprising at least one material selected from the group consisting of titanium nitride, titanium suicide and a titanium-tungsten alloy, the surface layer disposed on the substrate surface;

forming a metal wiring layer on the surface layer, the metal wiring layer having an upper surface;

forming a protective layer comprising at least one material selected from the group consisting of titanium nitride, titanium silicide and a titanium-tungsten alloy, the protective layer disposed on the upper surface of the metal wiring layer, the protective layer having a top surface;

forming a cap layer comprising at least one material selected from the group consisting of an oxide, a nitride, and an oxynitride, the cap layer disposed on the top surface of the protective layer;

forming a patterned photoresist layer above the cap layer, said patterned photoresist layer covering selected portions of the cap layer and exposing other portions of the cap layer;

etching the exposed portions of the cap layer, the protective layer and the metal layer to form wiring lines separated by gaps; and

forming a layer of high density plasma chemical vapor deposition dielectric material within the gaps to fill the gaps.