Method and apparatus for a CMOS image sensor with a distributed amplifier

• US 6,130,423 A
• Filed: 07/10/1998
• Issued: 10/10/2000
• Est. Priority Date: 07/10/1998
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Pixel Cam, Inc.
• Inventors: Brehmer, Kevin E., Erdogan, Ozan E.
• Primary Examiner(s): Ham, Seungsook
• Assistant Examiner(s): PYO, KEVIN K
• Application Number:
  US09/113,395
• Time in Patent Office: 823 Days
• Field of Search: 250/208.1, 250/214 R, 250/214 A, 250/214.1, 348/241, 348/301, 348/302, 348/307, 348/308, 348/309, 348/310, 257/290, 257/291, 257/292
• US Class Current: 250/208.1
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/74 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 3/1568 for disturbance correction or prevention within the image-sensor, e.g. biasing, blooming, smearing correction circuits H04N25/62

Abstract

A CMOS image sensor circuit having a distributed amplifier is disclosed. The CMOS image sensor circuit is constructed using a photo sensor that converts light intensity to into voltage, a reset transistor to charge the photo sensor, and a distributed amplifier to detect and read out the voltage value created by the photo sensor. The distributed amplifier is distributed in the sense that portions of the amplifier circuitry reside within individual pixel circuits that form a CMOS image sensor array. The remainder of the amplifier resides in a column read out circuit that is at the bottom of the CMOS image sensor array.

Claims

1. A method of detecting light with an image sensor array, said method comprising:

charging a photo sensor to a reference voltage level;

integrating photons with said photo sensor to generate a photo voltage; and

amplifying said photo voltage with a distributed amplifier having a distributed feedback loop, a portion of said distributed amplifier and said distributed feedback loop residing in a pixel circuit in said image sensor array and a remainder of said distributed amplifier and said distributed feedback loop residing in a read-out circuit coupled to said image sensor array.

2. The method as claimed in claim 1 wherein said photo sensor comprises a photo diode.

3. The method as claimed in claim 1 wherein said photo sensor comprises a photo-gate.

4. The method as claimed in claim 1 wherein said distributed amplifier produces unity gain.

5. The method as claimed in claim 1 wherein said distributed amplifier is fabricated using N-Well process technology.

6. The method as claimed in claim 1 wherein a portion of a first stage of said distributed amplifier resides in a pixel circuit in said image sensor array and a remainder of said first stage of said distributed amplifier and a second stage of said distributed amplifier reside in said read-out circuit.

7. The method as claimed in claim 6 wherein said second stage of said distributed amplifier comprises a cascading transistor pair.

8. The method as claimed in claim 6 wherein said second stage of said distributed amplifier comprises a differential transistor pair in a unity gain feedback configuration.

9. The method as claimed in claim 1 wherein said image sensor array is implemented with CMOS logic.

10. The method as claimed in claim 1 further comprising:

activating said distributed amplifier with a row select transistor.

11. An image sensor array, said image sensor array comprising:

a photo sensor, said photo sensor for detecting photons to generate a photo voltage value;

a reset circuit, said reset circuit for charging said photo sensor; and

a distributed amplifier, said distributed amplifier for amplifying said photo voltage value wherein a portion of said distributed amplifier resides in a pixel circuit in said image sensor array, a remainder of said distributed amplifier resides in a read-out circuit coupled to said image sensor array, and said distributed amplifier includes a distributed feedback loop wherein current from said remainder of said distributed amplifier residing in said read-out circuit is fed back to said portion of said distributed amplifier residing in said a pixel circuit in said image sensor array.

12. The image sensor array as claimed in claim 11 wherein said photo sensor comprises a photo diode.

13. The image sensor array as claimed in claim 11 wherein said photo sensor comprises a photo-gate.

14. The image sensor array as claimed in claim 11 wherein said distributed amplifier produces unity gain.

15. The image sensor array as claimed in claim 11 wherein said distributed amplifier is fabricated using N-Well process technology.

16. The image sensor array as claimed in claim 11 wherein a portion of a first stage of said distributed amplifier resides in a pixel circuit in said image sensor array and a remainder of said first stage of said distributed amplifier and a second stage of said distributed amplifier reside in said read-out circuit.

17. The image sensor array as claimed in claim 16 wherein said second stage of said distributed amplifier comprises a cascoding transistor pair.

18. The image sensor array as claimed in claim 16 wherein said second stage of said distributed amplifier comprises a differential transistor pair in a unity gain feedback configuration.

19. The image sensor array as claimed in claim 11 wherein said image sensor array is implemented with CMOS logic.

20. The image sensor array as claimed in claim 11 wherein said distributed amplifier is activated by a row select transistor.

22. The image sensor array as claimed in claim 11 wherein said photo sensing means comprises a photo diode.

21. An image sensor array for capturing images, said image sensor array comprising:

photo sensing means for detecting photons to generate a photo voltage;

a reset circuit, said reset circuit for charging said photo sensing means; and

amplifier means for buffering said photo voltage, said amplifier for amplifying said photo voltage wherein a portion of said amplifier means resides in a pixel circuit in said image sensor array, a remainder of said amplifier means resides in a read-out circuit coupled to said image sensor array, and said amplifier means includes a distributed feedback loop wherein current from said remainder of said amplifier means residing in said read-out circuit is fed back to said portion of said amplifier means residing in said a pixel circuit in said image sensor array.

23. The image sensor array as claimed in claim 21 wherein a portion of a first stage of said amplifier means resides in a pixel circuit in said image sensor array and a remainder of said first stage of said amplifier means and a second stage of said amplifier means reside in said read-out circuit.

24. The image sensor array as claimed in claim 23 wherein said second stage of said amplifier means comprises a cascading transistor pair.

25. The image sensor array as claimed in claim 23 wherein said second stage of said amplifier means comprises a differential transistor pair in a unity gain feedback configuration.