MOS image sensor

• US 6,141,050 A
• Filed: 06/20/1997
• Issued: 10/31/2000
• Est. Priority Date: 06/20/1997
• Status: Expired due to Term

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Loinaz, Marc J., Inglis, David Andrew, Ackland, Bryan David
• Primary Examiner(s): HO, TUAN V
• Application Number:
  US08/879,926
• Time in Patent Office: 1,229 Days
• Field of Search: 348/294, 348/297, 348/300, 348/302, 348/308, 348/310, 348/241, 348/243, 348/248, 327/314, 327/315
• US Class Current: 348/308
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: H04N 25/779 Circuitry for scanning or addressing the pixel array
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
• CPC Class Codes: H04N 3/1512 for MOS image-sensors, e.g. MOS-CCD H04N3/1581 takes precedence

Abstract

An image sensor circuit which employs a photodiode in conjunction with a charge transfer mechanism. By employing the photodiode, at least a portion of the light sensed does not pass through a layer of polysilicon, and so is not prevented from reaching the sensing area by the polysilicon. The image sensor circuit of the invention is made up of device structures readily available in standard CMOS process technologies Advantageously, image sensors embodying the invention show substantially improved quantum efficiency for short wavelength light over the prior art sensors. In addition, image sensors embodying the invention display improved dark current uniformity, thus improving yield.

Claims

1. An image sensor circuit, comprising:

a first photodiode, having first and second terminals;

a first metal oxide semiconductor (MOS) transistor, a drain of said MOS transistor being coupled to said first terminal of said first photodiode for collecting charge developed by light falling on said first photodiode;

a second MOS transistor, a source of said second MOS transistor being coupled to said first terminal of said first photodiode and to said drain of said first MOS transistor;

a capacitor, one terminal of said capacitor being coupled to a drain of said second transistor;

a third MOS transistor, said source of said third MOS transistor being coupled to said drain of said second transistor;

wherein said charge collected in said first MOS transistor is transferred through said second MOS transistor and converted into a voltage by said capacitor.

2. The invention as defined in claim 1 wherein charge transference occurs when a signal is applied to a gate of said first MOS transistor so as to turn said first MOS transistor off.

3. The invention as defined in claim 1 wherein charge transference occurs when a signal is applied to a gate of said first MOS transistor is driven so as to substantially eliminate its inversion layer.

4. The invention as defined in claim 1 wherein said second MOS transistor is configured as a common gate transistor.

5. The invention as defined in claim 1 wherein said sensor is reset by applying a signal to turn said third MOS transistor on.

6. The invention as defined in claim 1 wherein said circuit is manufactured on a p-substrate and said first terminal of said first photodiode is a cathode of said first photodiode.

7. The invention as defined in claim 1 wherein said circuit is manufactured on an n-substrate and said first terminal of said first photodiode is an anode of said first photodiode.

8. The invention as defined in claim 1 wherein said third MOS transistor is a PMOS transistor and wherein said connections of said drain and said source of said third MOS transistor are reversed.

9. The invention as defined in claim 1 further including a second photodiode having a first of its terminals coupled to a source of said first MOS transistor and wherein said first MOS transistor also collects charge developed by light falling on said second photodiode.

10. The invention as defined in claim 9 wherein said circuit is manufactured on a p-substrate and said first terminal of said second photodiode is a cathode of said second photodiode.

11. The invention as defined in claim 9 wherein said circuit is manufactured on an n-substrate and said first terminal of said second photodiode is an anode of said second photodiode.

12. The invention as defined in claim 1 wherein said capacitor is coupled to an amplifier.

13. The invention as defined in claim 12 wherein said amplifier is coupled to a sample-and-hold circuit.

14. The invention as defined in claim 12 wherein said amplifier is coupled to at least two sample-and-hold circuits.

15. The invention as defined in claim 14 wherein said third MOS transistor is turned on and a representation of a first output is stored in a first of said at least two sample-and-hold circuits while said first MOS transistor is enabled to turn on by a signal applied to a gate of said first MOS transistor.

16. The invention as defined in claim 14 wherein said third MOS transistor is turned off and a representation of a second output is stored in a second of said at least two sample-and-hold circuits while said first MOS transistor is turned off by a signal applied to a gate of said first MOS transistor.

17. The invention as defined in claim 14 wherein said third MOS transistor is turned off and a representation of a second output is stored in a second of said at least two sample-and-hold circuits after said first MOS transistor is turned off by a signal applied to a gate of said first MOS transistor.

18. The invention as defined in claim 14 wherein said third MOS transistor is turned on and a representation of said first output is stored in a first of said at least two sample-and-hold circuits while said first MOS transistor is enabled to turned on by a signal applied to a gate of said first MOS transistor and thereafter said third MOS transistor is turned off and a representation of said second output is stored in a second of said at least two sample-and-hold circuits after said charge accumulated by said first MOS transistor is transferred to said capacitor by a signal applied to a gate of said first MOS transistor.

19. The invention as defined in claim 18 further including means for determining a difference between said representation of said first output is stored in said first of said at least two sample-and-hold circuits and said representation of said second output is stored in said second of said at least two sample-and-hold circuits.

20. An image sensor circuit, comprising:

a p-substrate having formed therein at least one n+ region, a junction between said p-substrate and said n+ region forming a first photodiode;

an insulator layer between said p-substrate layer and a layer of polysilicon to form a first NMOS transistor, a cathode of said at least one photodiode being coupled to a drain of said NMOS transistor, said first NMOS transistor being for collecting charge developed by light falling on said first photodiode;

a second NMOS transistor, a source of said second NMOS transistor being coupled to said first terminal of said first photodiode and to said drain of said first NMOS transistor;

a capacitor, one terminal of said capacitor being coupled to a drain of said second transistor;

a third MOS transistor, said source of said third MOS transistor being coupled to said drain of said second NMOS transistor;

wherein said charge collected in said first NMOS transistor is transferred through said second NMOS transistor and converted into a voltage by said capacitor.

24. The invention as defined in claim 20 wherein said insulator layer is an oxide layer.

25. The invention as defined in claim 24 wherein said insulator layer includes silicon dioxide.

21. The invention as defined in 20 wherein said third MOS transistor is a NMOS transistor.

22. The invention as defined in 20 wherein said third MOS transistor is a PMOS transistor.

23. The invention as defined in 20 further including at least a second n+ region, a junction between said p-substrate and said second n+ region forming a second photodiode, a cathode of said second photodiode being coupled to a source of said first NMOS transistor wherein said first NMOS transistor also collects charge developed by light falling on said second photodiode.

26. An image sensor circuit, comprising:

a n-substrate having formed therein at least one p+ region, a junction between said n-substrate and said p+ region forming a first photodiode;

an insulator layer between said n-substrate layer and a layer of polysilicon to form a first PMOS transistor, an anode of said photodiode being coupled to a drain of said PMOS transistor;

a second PMOS transistor, a source of said second PMOS transistor being coupled to said first terminal of said first photodiode and to said drain of said first PMOS transistor;

a capacitor, one terminal of said capacitor being coupled to a drain of said second transistor;

a third MOS transistor, said source of said third MOS transistor being coupled to said drain of said second PMOS transistor;

wherein said charge collected in said first PMOS transistor is transferred through said second PMOS transistor and converted into a voltage by said capacitor.

27. The invention as defined in claim 26 wherein said third MOS transistor is an PMOS transistor.

28. The invention as defined in claim 26 wherein said third MOS transistor is an NMOS transistor.

29. The invention as defined in claim 26 further including at least a second p+ region, a junction between said n-substrate and said second p+ region forming a second photodiode, an anode of said second photodiode being coupled to a source of said first PMOS transistor wherein said first PMOS transistor also collects charge developed by light falling on said second photodiode.

30. The invention as defined in claim 26 wherein said insulator layer is an oxide layer.

31. The invention as defined in claim 26 wherein said insulator layer includes silicon dioxide.

32. A method for operating an image sensor circuit, said image sensor including

a first photodiode, having first and second terminals;

a first metal oxide semiconductor (MOS) transistor, a drain of said MOS transistor being coupled to said first terminal of said first photodiode for collecting charge developed by light falling on said first photodiode;

a second MOS transistor in a common gate configuration, a source of said second MOS transistor being coupled to said first terminal of said first photodiode and to said drain of said first MOS transistor;

a capacitor, one terminal of said capacitor being coupled to a drain of said second transistor;

a third MOS transistor, said source of said third MOS transistor being coupled to said drain of said second transistor;

the method comprising the steps of;

collecting electrons developed by light falling on said first photodiode;

setting the value of a voltage across said capacitor to a first value;

storing a representation of said first value;

transferring said collected electrons to said capacitor; and

storing a representation of the value of a second voltage across said capacitor after said transferring step.

33. The invention as defined in claim 32 further including the step of developing a difference between said stored representation of said first value and said stored representation of the value of a second voltage across said capacitor after said transferring step.