Semiconductor substrate and method of manufacturing the same

• US 6,143,628 A
• Filed: 03/25/1998
• Issued: 11/07/2000
• Est. Priority Date: 03/27/1997
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Sakaguchi, Kiyofumi, Sato, Nobuhiko, Yonehara, Takao
• Primary Examiner(s): Picardat, Kevin M.
• Assistant Examiner(s): COLLINS, DEVEN M
• Application Number:
  US09/047,326
• Time in Patent Office: 958 Days
• Field of Search: 438/455, 438/406, 438/409, 438/458, 438/459
• US Class Current: 438/455
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187

Abstract

A manufacturing method excellent in controllability, productivity and economics of a high-quality SOI wafer and a wafer manufactured by that method are provided. After wafer bonding, separation is made on an interface of a high porosity layer in a porous region including a low porosity layer and the high porosity layer in a surface formed on a main surface side of a first Si substrate 2 to transfer a non-porous layer onto a second substrate. After separation at the high porosity layer, a residual low porosity thin layer is made non-porous by a smoothing process such as hydrogen annealing without using selective etching.

Claims

1. A method of manufacturing a semiconductor substrate comprising the steps of:

preparing a first substrate having a porous region including at least two layers different in porosity and a non-porous layer formed on said porous region;

bonding a surface of said non-porous layer of said first substrate to a surface of a second substrate;

separating said first and second substrates from each other to transfer said non-porous layer to said second substrate; and

removing the residual portion of the porous region remaining on a separation surface of said second substrate or making the residual portion non-porous to smooth said separation surface;

wherein the step of preparing said first substrate comprises a step of forming a first porous layer of 1 μ

m or less thickness, a second porous layer adjacent to said first porous layer and high in porosity, and said non-porous layer adjacent to said first porous layer.

2. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein the step of forming said non-porous layer comprises a step of making a surface side portion of said first porous layer non-porous, and/or a step of forming a non-porous layer on said first porous layer.

3. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein the step of forming said first porous layer comprises a step of making, after forming a porous layer, a surface side portion of said porous layer non-porous to make a remaining porous layer 1 μ

m or less in thickness.

4. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second porous layer is thickened more than said first porous layer.

5. A method of manufacturing a semiconductor substrate as claimed in claim 1 or 4, wherein after a second porous layer thinner than said first porous layer is formed, a surface side portion of said first porous layer is made non-porous to thin said first porous layer.

6. A method of manufacturing a semiconductor substrate as claimed in claim 1, further comprising a step of forming a third porous layer thicker and lower in porosity than said second porous layer on a side opposite to said first porous layer with respect to said second porous layer.

7. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said separation surface smoothing step is conducted by a heat treatment in a non-oxidizing atmosphere without using anyone of selective etching and polishing.

8. A method of manufacturing a semiconductor substrate as claimed in claim 6, wherein said non-oxidizing atmosphere is hydrogen, an inert gas or a mixture atmosphere consisting of hydrogen and the inert gas.

9. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein the step of smoothing said separation surface is conducted by a heat treatment in vacuum without using any one of selective etching and polishing.

10. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said porous region is made of single crystal.

11. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said porous region is a single crystal Si layer.

12. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said porous region is formed by anodizing said first substrate.

13. A method of manufacturing a semiconductor substrate as claimed in claim 12, wherein said first porous layer and said second porous layer are formed by anodization and selectively formed according to the kind and concentration of impurities in the first substrate, a current density, the composition and temperature of a chemical agent at the time of anodization or a combination thereof.

14. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein after the porous region is formed on one surface of the first substrate, said second porous layer is formed at an ion projection range position by ion implantation.

15. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein a side wall surface of pores in the porous region is oxidized to such a degree that a porous crystal structure remains in the interior of the side wall before the non-porous layer is formed.

16. A method of manufacturing a semiconductor substrate as claimed in claim 15, wherein an oxide film formed on the side wall of the pores in the surface of said porous region and in the vicinity of the surface thereof is removed before said non-porous layer is formed.

17. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said non-porous layer includes a portion where the surface of said first porous layer is made non-porous by a heat treatment in a non-oxidizing atmosphere or in a vacuum.

18. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said non-porous layer includes a portion where the surface of said first porous layer is made non-porous by a heat treatment in a non-oxidizing atmosphere or in a vacuum, and an oxide film formed on the surface of said non-porous layer.

19. A method of manufacturing a semiconductor substrate as claimed in claim 17 or 18, wherein said non-oxidizing atmosphere is hydrogen, an inert gas or a mixture gas atmosphere thereof.

20. A method of manufacturing a semiconductor substrate as claimed in claim 17 or 18, wherein said non-oxidizing atmosphere includes a small amount of Si.

21. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said non-porous layer is formed by epitaxy on the basis of a crystal orientation of said first porous layer.

22. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said non-porous layer consists of a single crystal layer formed by epitaxy on the basis of a crystal orientation of said first porous layer, and an oxide film layer formed above said single crystal layer.

23. A method of manufacturing a semiconductor substrate as claimed in claim 21 or 22, wherein said non-porous layer formed by epitaxy is a single crystal Si layer.

24. A method of manufacturing a semiconductor substrate as claimed in claim 21 or 22, wherein said non-porous layer formed by epitaxy has a single crystal compound semiconductor layer.

25. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said non-porous layer consists of a plurality of layers different in electric conductive type or impurity concentration.

26. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said first substrate after being separated is reused.

27. A method of manufacturing a semiconductor substrate as claimed in claim 26, wherein a pre-treatment for reusing consists of only a smoothing process.

28. A method of manufacturing a semiconductor substrate as claimed in claim 26, wherein a pre-treatment for reusing comprises a process of removing a residual portion of the porous region remaining after separation and a flattening process.

29. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said separating step is conducted by any one of pressurizing, tension, shearing, wedge insertion, a heat treatment, oxidation, wave motion application and wire cutting or a combination thereof.

30. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second substrate is made of Si.

31. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second substrate is formed of an Si substrate, and an insulating film is formed on at least one of the surfaces to be bonded.

32. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second substrate is formed of a light transmissive substrate.

33. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said first porous layer is of 0.5 μ

m or less in thickness.

34. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second porous layer has the highest porosity in the porous region.

35. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said porous region consists of only two layers of the first porous layer and the second porous layer.

36. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said second porous layer is of 1 μ

m or less in thickness.

37. A method of manufacturing a semiconductor substrate as claimed in claim 36, wherein said second porous layer is of 0.5 μ

m or less in thickness.

38. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein said porous region is of 2 μ

m or less in thickness.

39. A method of manufacturing a semiconductor substrate as claimed in claim 1, wherein in the step of forming said first porous layer, after a porous layer of 1 μ

m or less thickness is formed, a surface side portion of said porous layer is made non-porous to make the remaining porous layer 0.5 μ

m or less thickness.

40. A semiconductor substrate manufactured by a method of manufacturing a semiconductor substrate as claimed in claim 1.

41. A method of manufacturing a semiconductor article comprising the steps of:

preparing a first substrate having a porous region including at least two layers different in porosity and a non-porous layer formed on said porous region;

bonding a surface of said non-porous layer of said first substrate to a surface of a second substrate; and

separating said first and second substrates from each other to transfer said non-porous layer to said second substrate;

wherein the step of preparing said first substrate comprises a step of forming a first porous layer of 1 μ

m or less thickness, a second porous layer adjacent to said first porous layer and high in porosity, and said non-porous layer adjacent to said first porous layer.

42. A method of manufacturing a semiconductor article as claimed in claim 41, wherein the step of forming said non-porous layer comprises a step of making a surface side portion of said first porous layer non-porous, and/or a step of forming a non-porous layer on said first porous layer.

43. A method of manufacturing a semiconductor article as claimed in claim 41, wherein the step of forming said first porous layer comprises a step of making, after forming a porous layer, a surface side portion of said porous layer non-porous to make a remaining porous layer 1 μ

m or less in thickness.

44. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said second porous layer is thickened more than said first porous layer.

45. A method of manufacturing a semiconductor article as claimed in claim 41 or 44, wherein after a second porous layer thinner than said first porous layer is formed, a surface side portion of said first porous layer is made non-porous to thin said first porous layer.

46. A method of manufacturing a semiconductor article as claimed in claim 41, further comprising a step of forming a third porous layer thicker and lower in porosity than said second porous layer on a side opposite to said first porous layer with respect to said second porous layer.

47. A method of manufacturing a semiconductor article as claimed in claim 41, further comprising a separation surface smoothing step conducted by a heat treatment in a non-oxidizing atmosphere without using any one of selective etching and polishing.

48. A method of manufacturing a semiconductor article as claimed in claim 46, wherein said non-oxidizing atmosphere is hydrogen, an inert gas or a mixture atmosphere consisting of hydrogen and the inert gas.

49. A method of manufacturing a semiconductor article as claimed in claim 41, further comprising a step of smoothing a separation surface conducted by a heat treatment in vacuum without using any one of selective etching and polishing.

50. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said porous region is made of single crystal.

51. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said porous region is a single crystal Si layer.

52. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said porous region is formed by anodizing said first substrate.

53. A method of manufacturing a semiconductor article as claimed in claim 52, wherein said first porous layer and said second porous layer are formed by anodization and selectively formed according to the kind and concentration of impurities in the first substrate, a current density, the composition and temperature of a chemical agent at the time of anodization or a combination thereof.

54. A method of manufacturing a semiconductor article as claimed in claim 41, wherein after the porous region is formed on one surface of the first substrate, said second porous layer is formed at an ion projection range position by ion implantation.

55. A method of manufacturing a semiconductor article as claimed in claim 41, wherein a side wall surface of pores in the porous region is oxidized to such a degree that a porous crystal structure remains in the interior of the side wall before the non-porous layer is formed.

56. A method of manufacturing a semiconductor article as claimed in claim 55, wherein an oxide film formed on the side wall of the pores in the surface of said porous region and in the vicinity of the surface thereof is removed before said non-porous layer is formed.

57. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said non-porous layer includes a portion where the surface of said first porous layer is made non-porous by a heat treatment in a non-oxidizing atmosphere or in a vacuum.

58. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said non-porous layer includes a portion where the surface of said first porous layer is made non-porous by a heat treatment in a non-oxidizing atmosphere or in a vacuum, and an oxide film formed on the surface of said non-porous layer.

59. A method of manufacturing a semiconductor article as claimed in claim 57 or 58, wherein said non-oxidizing atmosphere is hydrogen, an inert gas or a mixture gas atmosphere thereof.

60. A method of manufacturing a semiconductor article as claimed in claim 57 or 58, wherein said non-oxidizing atmosphere includes a small amount of Si.

61. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said non-porous layer is formed by epitaxy on the basis of a crystal orientation of said first porous layer.

62. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said non-porous layer consists of a single crystal layer formed by epitaxy on the basis of a crystal orientation of said first porous layer, and an oxide film layer formed above said single crystal layer.

63. A method of manufacturing a semiconductor article as claimed in claim 61 or 62, wherein said non-porous layer formed by epitaxy is a single crystal Si layer.

64. A method of manufacturing a semiconductor article as claimed in claim 61 or 62, wherein said non-porous layer formed by epitaxy has a single crystal compound semiconductor layer.

65. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said non-porous layer consists of a plurality of layers different in electric conductive type or impurity concentration.

66. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said first substrate after being separated is reused.

67. A method of manufacturing a semiconductor article as claimed in claim 66, wherein a pre-treatment for reusing consists of only a smoothing process.

68. A method of manufacturing a semiconductor article as claimed in claim 66, wherein a pre-treatment for reusing comprises a process of removing a residual portion of the porous region remaining after separation and a flattening process.

69. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said separating step is conducted by any one of pressurizing, tension, shearing, wedge insertion, a heat treatment, oxidation, wave motion application and wire cutting or a combination thereof.

70. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said second substrate is made of Si.

72. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said second substrate is formed of a light transmissive substrate.

73. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said first porous layer is of 0.5 μ

m or less in thickness.

74. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said second porous layer has the highest porosity in the porous region.

75. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said porous region consists of only two layers of the first porous layer and the second porous layer.

76. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said second porous layer is of 1 μ

m or less in thickness.

77. A method of manufacturing a semiconductor article as claimed in claim 76, wherein said second porous layer is of 0.5 μ

m or less in thickness.

78. A method of manufacturing a semiconductor article as claimed in claim 41, wherein said porous region is of 2 μ

m or less in thickness.

79. A method of manufacturing a semiconductor article as claimed in claim 41, wherein in the step of forming said first porous layer, after a porous layer of 1 μ

m or less thickness is formed, a surface side portion of said porous layer is made non-porous to make the remaining porous layer 0.5 μ

m or less thickness.

80. A semiconductor article manufactured by a method of manufacturing a semiconductor article as claimed in claim 41.

71. A method of manufacturing a semiconductor article as claimed in clam 41, wherein said second substrate is formed on an Si substrate, and an insulating film is formed on at least one of the surfaces to be bonded.

81. A method of manufacturing a semiconductor article as claimed in clam 41, further comprising a step of smoothing a separation surface of the second substrate.

82. A method of manufacturing a semiconductor article as claimed in claim 81, wherein the smoothing step comprises a step of removing the residual portion of the porous region, and/or a step of making the residual portion of the porous region non-porous.