Semiconductor integrated circuit device having component circuits free from through-current in transition period between active mode and sleep mode
First Claim
1. A semiconductor integrated circuit device comprising:
- a first component circuit selectively entering an active mode and a sleep mode, and includingan input port having plural input nodes supplied with input signals,an output port having output nodes assigned to output signals andfirst transistors connected between a first power supply line and a virtual power supply line different in potential level from said first power supply line, much liable to flow a first leakage current therethrough and responsive to said input signal in said active mode for producing said output signal at said output port;
a second transistor connected between said virtual power supply line and a second power supply line different in potential level from said first power supply line, less liable to flow a second leakage current therethrough, and responsive to a mode signal so as to connect said virtual power supply line to said in said sleep mode in said active mode and disconnect said virtual power supply line from said second power supply line;
a signal line connectable to said plural output nodes; and
a switching circuit connected between said output nodes and said signal line, and responsive to a control signal so as to connect said output nodes to said signal line in said active mode and disconnect said output nodes from said signal line in at least said sleep mode.
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Accused Products
Abstract
A semiconductor integrated circuit device has a high-speed bus driver and a bus receiver both connected to a bus line, and the high-speed bus driver enters an active mode powered from a positive power voltage line and a virtual ground line and a sleep mode isolating the virtual ground line from a ground line for reducing power consumption, wherein a switching circuit is connected between the high-speed bus driver and the bus line so as to isolate the bus line from the high-speed bus driver in transition periods and the sleep mode, thereby cutting a conductive path for through-current due to leakage current inherent in the high-speed component field effect transistors of the bus driver.
25 Citations
28 Claims
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1. A semiconductor integrated circuit device comprising:
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a first component circuit selectively entering an active mode and a sleep mode, and including an input port having plural input nodes supplied with input signals, an output port having output nodes assigned to output signals and first transistors connected between a first power supply line and a virtual power supply line different in potential level from said first power supply line, much liable to flow a first leakage current therethrough and responsive to said input signal in said active mode for producing said output signal at said output port; a second transistor connected between said virtual power supply line and a second power supply line different in potential level from said first power supply line, less liable to flow a second leakage current therethrough, and responsive to a mode signal so as to connect said virtual power supply line to said in said sleep mode in said active mode and disconnect said virtual power supply line from said second power supply line; a signal line connectable to said plural output nodes; and a switching circuit connected between said output nodes and said signal line, and responsive to a control signal so as to connect said output nodes to said signal line in said active mode and disconnect said output nodes from said signal line in at least said sleep mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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17. The semiconductor integrated circuit device as set forth in clam 15, in which said switching element is formed by a parallel combination of one of said first transistors of one channel conductivity type and another of said first transistors of the opposite channel conductivity type.
Specification