Semiconductor device and method of manufacturing the same

• US 6,150,233 A
• Filed: 07/20/1998
• Issued: 11/21/2000
• Est. Priority Date: 02/13/1998
• Status: Expired due to Fees

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Kobayashi, Hiromichi, Horita, Katsuyuki, Kuroi, Takashi, Sakai, Maiko
• Primary Examiner(s): DANG, TRUNG Q
• Application Number:
  US09/118,925
• Time in Patent Office: 855 Days
• Field of Search: 438/424, 438/427, 438/435, 438/437, 438/759, 148/DIG. 50
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264
• CPC Class Codes: H01L 21/76232 of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls H01L21/76229 takes precedence
• CPC Class Codes: Y10S 148/05 Etch and refill

Abstract

An underlaid silicon oxide film (2) and a polycrystalline silicon film (5) are formed in this order on a surface (1S) of a silicon substrate (1). The polycrystalline silicon film (5) and the underlaid silicon oxide (2) are opened by anisotropic etching, to form a trench (21) extending to the inside of the semiconductor substrate (1). A silicon oxide film (11) formed by HDP-CVD is buried in the trench (21). A resist (41) is formed only on a surface of the silicon oxide film (11) in a device isolation region (20). The silicon oxide film (11) in an active region (30) is removed by dry etching with the resist (41) as a mask. After removing the resist (41), only the polycrystalline silicon film (5) is removed by dry etching. The underlaid oxide film (2) is removed by wet etching with hydrofluoric acid. By this method of manufacturing a semiconductor device, the surface of the semiconductor substrate and a trench-type device isolation are flattened effectively at low cost.

Claims

1. A method of manufacturing a semiconductor device, comprising:

a first step of forming a hardmask layer including at least one layer on a surface of a semiconductor substrate;

a second step of forming a trench serving as a device isolation region and an active region which is a region other than said device isolation region inside said semiconductor substrate by etching part of said semiconductor substrate from a predetermined region in a surface of said hardmask layer;

a third step of forming a dielectric by a film-formation method in which an etching and a deposition are simultaneously performed on said surface of said hardmask layer and in said trench to bury said dielectric in said trench to the same level as said surface of said hardmask layer;

a fourth step of forming a resist on a surface of said dielectric at least in said device isolation region;

a fifth step of removing all of said dielectric on said active region with said resist as a mask, said dielectric is not covered with said resist; and

a sixth step of removing said resist and said hardmask layer in this order.

2. The method according to claim 1, wherein

at least one layer included in said hardmask layer is hard to etch in dry etching for said dielectric, and

said fifth step comprises the step of

removing said dielectric by dry etching.

3. The method according to claim 2, wherein

at least one layer included in said hardmask layer is a non-single crystalline silicon film.

4. A method of manufacturing a semiconductor device, comprising:

a first step of forming a hardmask layer including at least one layer on a surface of a semiconductor substrate;

a second step of forming a trench serving as a device isolation region and an active region which is a region other than said device isolation region inside said semiconductor substrate by etching part of said semiconductor substrate from a predetermined region in a surface of said hardmask layer;

a third step of forming a dielectric by a film-formation method in which an etching and a deposition are simultaneously performed on said surface of said hardmask layer and in said trench to bury said dielectric in said trench to the same level as said surface of said hardmask layer;

a fourth step of forming a resist on a surface of said dielectric at least in said device isolation region;

a fifth step of removing said dielectric on said active region with said resist as a mask, said dielectric is not covered with said resist; and

a sixth step of removing said resist and said hardmask layer in this order, wherein said fourth step comprises the step of forming said resist on said dielectric in said active region so that said resist extends by a length corresponding to an alignment margin from an end portion of said device isolation region towards said active region; and

said sixth step comprises the step of etching said dielectric with hydrofluoric acid before removing said hardmask layer after removing said resist.

5. The method according to claim 4, wherein

said hardmask layer is formed to have a film thickness larger than twice said alignment margin.

6. The method according to claim 4, wherein

said fourth step comprises the step of

forming another resist on said surface of said dielectric in a region between said resist extending to said active region and an adjacent resist thereof when said region has a length not more than a minimum design size of said semiconductor device.

7. The method according to claim 6, wherein

said hardmask layer is formed to have a film thickness larger than a larger one of twice said alignment margin and a sum of said alignment margin and half of said minimum design size.