Integrated deposition process for copper metallization

• US 6,174,811 B1
• Filed: 12/02/1998
• Issued: 01/16/2001
• Est. Priority Date: 12/02/1998
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Ding, Peijun, Hashim, Imran, Chin, Barry, Sun, Bingxi
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): NGUYEN, HA T
• Application Number:
  US09/204,323
• Time in Patent Office: 776 Days
• Field of Search: 438/687, 438/685, 438/627, 438/632, 438/643, 438/646, 438/648, 438/653, 438/658, 438/678, 438/680, 257/762
• US Class Current: 438/687
• CPC Class Codes: C23C 14/0641 Nitrides C23C14/0617 takes precedence
• CPC Class Codes: C23C 14/165 by cathodic sputtering
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 21/76876 for deposition from the gas phase, e.g. CVD
• CPC Class Codes: H01L 21/76877 Filling of holes, grooves or trenches, e.g. vias, with conductive material
• CPC Class Codes: H01L 21/76882 Reflowing or applying of pressure to better fill the contact hole

Abstract

Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

Claims

1. A process for forming an interconnect, comprising:

positioning a patterned substrate into a first high density physical vapor deposition chamber and depositing a barrier layer on the substrate, wherein the barrier layer is selected from the group of tantalum, tantalum nitride, and combinations thereof;

positioning the substrate into a second high density physical vapor deposition chamber and depositing a first copper layer on the barrier layer; and

depositing a second copper layer on the first copper layer;

wherein depositing the barrier layer comprises delivering a bias between about 0.5 kW and about 5 kW to a target, delivering RF power between about 0.5 kW and about 3 kW to a source coil, and delivering a bias between about) W and about 500 W to the substrate.

2. The process of claim 1, wherein the second copper layer is deposited in an electroplating system.

3. The process of claim 1, wherein the second copper layer is deposited in a physical vapor deposition reflow chamber at a substrate temperature between about 200°

C. and about 450°

C.

4. The process of claim 1, wherein the second copper layer is deposited in a chemical vapor deposition chamber.

5. The process of claim 4, further comprising depositing a third copper layer over the second copper layer at a substrate temperature between about 100°

C. and about 450°

C.

6. The process of claim 1, wherein depositing the first copper layer comprises delivering a bias between about 0.5 kW and about 5 kW to a target, delivering RF power between about 0.5 and about 3 kW to a source coil, and delivering a bias between about 0 W and about 500 W to the substrate.

7. The process of claim 1, wherein the barrier layer and the first copper layer are deposited in an integrated system.