Tamper resistant methods and apparatus

• US 6,178,509 B1
• Filed: 09/05/1997
• Issued: 01/23/2001
• Est. Priority Date: 06/13/1996
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Mangold, Richard T., Shippy, Keith L., Graunke, Gary L., Maliszewski, Richard L., Aucsmith, David W., Pfotenhauer, Jody L., Nardone, Joseph M.
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): Revak, Christopher A.
• Application Number:
  US08/924,166
• Time in Patent Office: 1,236 Days
• Field of Search: 713/200, 713/187, 713/193, 713/194, 713/188, 713/201, 380/4, 380/228, 380/229, 380/230, 705/51, 705/57, 705/232, 709/232, 709/237
• US Class Current: 726/22
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]
• CPC Class Codes: G06F 21/14 against software analysis or reverse engineering, e.g. by obfuscation
• CPC Class Codes: G06F 21/52 during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
• CPC Class Codes: G06F 21/57 Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06F 2221/2107 File encryption
• CPC Class Codes: G06F 2221/2135 Metering
• CPC Class Codes: G06F 2221/2151 Time stamp
• CPC Class Codes: G11B 20/00086 Circuits for prevention of unauthorised reproduction or copying, e.g. piracy indicating unauthorised use of record carriers in general G11B23/28; scrambling for television signal recording H04N5/913; network architectures or network protocols for network security H04L63/00; cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00

Abstract

In one apparatus, a number of obfuscated programming instructions is provided to perform integrity verification on a number of other plain text programming instructions. In another apparatus, a number of obfuscated programming instructions is provided to self-verify an invocation of the obfuscated programming instructions is not originated from an intruder.

Claims

1. An apparatus comprising:

a storage medium having stored therein a plurality of plain text cells of programming instructions, and a plurality of obfuscated cells of programming instructions to perform integrity verification on the plain text cells of programming instructions, wherein said obfuscated cells of programming instructions are mutated through an inter-cell dependent mutation process; and

an execution unit coupled to the storage medium for executing the programming instructions.

2. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions perform said integrity verification on the plain text programming instructions during start-up time.

3. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions perform said integrity verification on the plain text programming instructions incrementally through multiple iterations during run time.

4. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated programming instructions to compare a signature of the plain text cells of programming instructions with a dynamically generated signature for the plain text cells of programming instructions to verify the integrity of the plain text cells of programming instructions.

5. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions to retrieve a signature of the plain text cells of programming instructions.

6. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions to dynamically generate a signature for the plain text cells of programming instructions.

7. The apparatus as set forth in claim 1, wherein the plurality of obfuscated cells of programming instructions include obfuscated cells of programming instructions to self-verify that an invocation of the obfuscated cells of programming instructions is not originated from an intruder.

8. The apparatus as set forth in claim 7, wherein the plurality of cells of obfuscated programming instructions include obfuscated cells of programming instructions to obtain a return address associated with the invocation and determine if the return address is within a known address space.

9. A method comprising:

a) executing a plurality of obfuscated cells of programming instructions to retrieve a signature of a plurality of plain text cells of programming instructions, wherein said obfuscated cells of programming instructions are mutated through an inter-cell dependent mutation process; and

b) executing the plurality of obfuscated cells of programming instructions to compare the signature with a dynamically generated signature of the plurality of plain text cells of programming instructions.

10. The method of claim 9, wherein the method further comprises (c) executing the plurality of obfuscated cells of programming instructions to dynamically generate the dynamically generated signature of the plurality of plain text cells of programming instructions.

11. The method of claim 9, wherein the method further comprises (c) executing the plurality of obfuscated cells of programming instructions through multiple iterations to incrementally generate the dynamically generated signature of the plurality of plain text cells of programming instructions.

12. The method of claim 9, wherein the method is performed during start-up time.

13. The method of claim 9, wherein the method is performed during run time, with the dynamically generated signature of the plain text cells of programming instructions being incrementally generated through multiple iterations of the plurality of obfuscated cells of programming instructions.

14. The method as set forth in claim 9, wherein the method further comprises (c) executing the plurality of obfuscated cells of programming instructions to self-verify that an invocation of the plurality of obfuscated cells of programming instructions did not originate from an intruder, and (a) and (b) are performed only if (c) verified that the invocation did not originate from an intruder.

15. The method of claim 14, wherein (c) comprises the plurality of obfuscated cells of programming instructions obtaining a return address associated with the invocation, and determining if the return address is within a known address space.

16. An apparatus comprising:

a storage medium having stored therein a plurality of obfuscated programming instructions designed to self-verify an invocation of the obfuscated programming instructions is not originated from an intruder; and

an execution unit coupled to the storage medium for executing the programming instructions.

17. The apparatus as set forth in claim 16, wherein the plurality of obfuscated programming instructions include obfuscated programming instructions designed to obtain a return address associated with the invocation and determine if the return address is within a known address space.

18. A method comprising:

a) invoking a plurality of obfuscated programming instructions;

b) self-verifying by the plurality of obfuscated programming instructions that the invocation did not originate from an intruder; and

c) executing the plurality of obfuscated programming instructions if step (b) verified that the invocation did not originate from an intruder.

19. The method of claim 18, wherein (b) comprises the plurality of obfuscated programming instructions obtaining a return address associated with the invocation, and determining if the return address is within a known address space.