Analog isolation system with digital communication across a capactive barrier

• US 6,191,717 B1
• Filed: 01/07/1999
• Issued: 02/20/2001
• Est. Priority Date: 04/22/1997
• Status: Expired due to Term

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Scott, Jeffrey W., Welland, David R., Sooch, Navdeep S.
• Primary Examiner(s): YOUNG, BRIAN K
• Assistant Examiner(s): Kost, Jasson
• Application Number:
  US09/226,253
• Time in Patent Office: 775 Days
• Field of Search: 341/110, 341/143, 379/399, 379/412
• US Class Current: 341/143
• CPC Class Codes: H04B 14/062 using delta modulation or one-bit differential modulation [1DPCM]
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/06 Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
• CPC Class Codes: H04L 7/033 using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
• CPC Class Codes: H04M 11/06 Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors

Abstract

An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

Claims

1. An isolation system for conveying an analog information signal from a transmitting circuit to a receiving circuit while electrically isolating the transmitting circuit from the receiving circuit, comprising:

a) an analog-to-digital converter having an input connected to receive the analog information signal from the transmitting circuit and an output providing a digital data signal;

b) an encoder circuit connected to the output of the analog-to-digital converter for encoding the digital data signal into a selected format;

c) an oscillator circuit connected to the analog-to-digital converter and to the encoder circuit to provide a clock signal thereto;

d) a driver circuit connected to receive the encoded digital signal from the encoder circuit and providing a digital output signal;

e) a first isolation capacitor having an input connected to receive the digital output signal from the driver circuit;

f) a clock recovery circuit having an input connected to an output of the isolation capacitor, the clock recovery circuit providing a clock signal that is substantially synchronized with the clock signal provided by the oscillator circuit;

g) a decoder circuit having a decoder input connected to the isolation capacitor output, a clock input connected to receive a clock signal from the clock recovery circuit, and a digital data output; and

h) a digital-to-analog converter connected to the digital data output, the digital-to-analog converter having an output terminal for providing an isolated analog signal to the receiving circuit.

2. The isolation system of claim 1, wherein the analog-to-digital converter and the digital-to-analog converter comprise delta-sigma modulators.

3. The isolation system of claim 1, further comprising a second isolation capacitor having an input and an output, and wherein the driver circuit is a differential output driver circuit having differential outputs connected to the inputs of each of the first and the second isolation capacitors, and wherein the clock recovery circuit has differential inputs connected to the outputs of each of the first and the second isolation capacitors.

4. The isolation system of claim 1, further comprising an isolated DC power supply circuit having an input connected to the first isolation capacitor and a power supply output connected to the clock recovery circuit and to the decoder circuit, the power supply circuit comprising a rectifier circuit and a filter circuit.

5. The isolation system of claim 1, wherein the encoder circuit comprises a digital control signal input for receiving a digital control signal from the transmitting circuit, and a multiplexer for multiplexing the digital control signal with the digital data signal, and wherein the decoder circuit comprises a demultiplexer for separating the digital control signal from the digital data signal.

6. A method for conveying an analog signal from a transmitting circuit to a receiving circuit while electrically isolating the transmitting circuit from the receiving circuit, comprising:

converting the analog signal to a synchronous digital signal;

transferring the synchronous digital signal across a capacitive isolation barrier to provide an isolated digital signal;

converting the isolated digital signal to an analog output signal; and

recovering a clock signal on the receiving circuit side of the barrier, and synchronizing the isolated digital signal to the recovered clock signal.

7. A bidirectional isolation barrier for conveying analog data signals between a powered circuit and an isolated circuit while electrically isolating the powered circuit from the isolated circuit, the barrier comprising:

a first isolation capacitor;

a powered-side signal processing system comprising;

a first synchronous analog-to-digital converter having an input connected to the powered circuit for receiving an analog data signal to be transmitted across the barrier in a first direction, and an output connected to a first side of the isolation capacitor for providing a synchronous digital signal to the isolation capacitor, and

a first synchronous digital-to-analog converter having an input connected to said first side of the isolation capacitor for receiving synchronous digital signals therefrom when data signals are transmitted in a second direction from the isolated circuit to the powered circuit, and having an output connected to the powered circuit for providing analog signals thereto;

an isolated-side signal processing system comprising;

a second synchronous digital-to-analog converter having an input connected to a second side of the isolation capacitor for receiving a synchronous digital signal therefrom when the data signals are transmitted in said first direction, and having an output connected to the isolated circuit for providing a reconstructed analog data signal thereto, and

a second synchronous analog-to-digital converter having an input connected to the isolated circuit for receiving an analog data signal to be transmitted across the barrier in said second direction to the powered circuit, and an output connected to the second side of the isolation capacitor for conveying a synchronous digital signal corresponding to said analog data signal to the isolation capacitor; and

a clock recovery circuit having an input connected to the isolation capacitor for receiving the synchronous digital signal therefrom, the clock recovery circuit having a data output and a clock output, the clock output providing a recovered clock signal, and the data output providing a digital data signal that is synchronized with the recovered clock signal.

8. The isolation barrier of claim 7, wherein the clock recovery circuit comprises a phase locked loop circuit including a filter circuit to reduce jitter in the recovered clock signal.

9. An isolated digital-to-analog converter for converting synchronous digital signals received from an isolation barrier into analog signals, comprising:

a clock recovery circuit having an input connected to the isolation barrier and being adapted to produce a recovered clock signal that is synchronized to the synchronous digital signals, the clock recovery circuit comprising a latch for resynchronizing the synchronous digital signals to the recovered clock signal; and

a synchronous digital-to-analog converter having a clock input connected to receive the recovered clock signal from the clock recovery circuit, a data input connected to receive the resynchronized digital signals from the clock recovery circuit, and an analog output.

10. The isolated digital-to-analog converter of claim 9, wherein the synchronous digital-to-analog converter comprises a delta-sigma modulator.

11. The isolated digital-to-analog converter of claim 9, wherein the clock recovery circuit comprises a phase locked loop and a filter circuit.

12. A method for transmitting an analog data signal across a capacitive isolation barrier, comprising:

converting the analog signal to a digital data signal;

combining the digital data signal with control information to form a digital encoded signal;

driving the digital encoded signal across the capacitive isolation barrier;

receiving an isolated encoded signal from the isolation barrier;

recovering a clock signal from the isolated encoded signal;

synchronizing the isolated encoded signal with the clock signal;

separating the isolated encoded signal into an isolated digital data signal and isolated control information; and

converting the isolated digital data signal into an isolated analog signal.

13. The method of claim 12, wherein the converting steps include using delta-sigma modulation to perform the analog to digital conversion and the digital to analog conversion.

14. An isolation system for providing a digital communication channel between a powered circuit and an isolated circuit, the isolation system comprising an isolation barrier and a clock recovery circuit located on an isolated side of the isolation barrier, the clock recovery circuit adapted to provide a recovered clock signal based on isolated signals received from the powered circuit across the isolation barrier, the recovered clock signal being substantially free of phase noise, the isolation system further comprising an analog to digital converter having an input connected to the powered circuit and an output connected to the isolation barrier, and a digital to analog converter having an input connected to the isolation barrier and an output connected to the isolated circuit.

15. The isolation system of claim 14, wherein the clock recovery circuit comprises a phase-locked loop circuit.

16. The isolation system of claim 15, wherein the phase-locked loop circuit comprises a loop filter circuit for reducing the effects of phase noise on the recovered clock signal.

17. The isolation system of claim 14, wherein the isolation barrier comprises one or more capacitors.

18. The isolation system of claim 14, wherein the digital communication channel is bidirectional.

19. The isolation system of claim 14, wherein the isolated signals are data signals.

20. The isolation system of claim 14, wherein the isolated signals are clock signals.

21. The isolation system of claim 14, wherein the analog to digital converter and the digital to analog converter are delta sigma converters.

22. An isolation system for communicating analog signal information across an isolation barrier in digital format, comprising:

an analog-to-digital converter with an input connected to an analog signal containing information to be communicated across the isolation barrier;

an isolation barrier having an input coupled to a digital output of the analog-to-digital converter;

a digital-to-analog converter having an input coupled to an output of the isolation barrier, the digital-to-analog converter providing an analog output signal;

wherein the analog-to-digital converter and the digital-to-analog converter are synchronized to a common clock signal; and

a clock recovery circuit having an input coupled to the output of the isolation barrier.

23. The isolation system of claim 22, further comprising a digital control signal coupled to the input of the isolation barrier.

24. The isolation system of claim 23, further comprising a multiplexer having a first input connected to the digital output of the analog-to-digital converter, a second input connected to receive the digital control signal, and an output coupled to the isolation barrier.

25. The isolation system of claim 22, wherein the isolation barrier is a capacitive isolation barrier.

26. The isolation system of claim 22, wherein the isolation barrier is a differential isolation barrier.

27. The isolation system of claim 22, wherein the isolation barrier is a bidirectional isolation barrier.

28. The isolation system of claim 22, wherein the analog-to-digital converter and the digital-to-analog converter are delta-sigma type converters.

29. A telephone line interface circuit comprising the isolation system of claim 22.