Active tunable inductor

• US 6,211,753 B1
• Filed: 03/25/1999
• Issued: 04/03/2001
• Est. Priority Date: 03/12/1999
• Status: Expired due to Fees

• Current Assignee: Telecommunications Research Laboratories
• Original Assignee: Telecommunications Research Laboratories
• Inventors: Leifso, Curtis, Haslett, James W.
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): GLENN, KIMBERLY E
• Application Number:
  US09/276,403
• Time in Patent Office: 740 Days
• Field of Search: 333/213, 333/214, 333/215, 333/216, 333/217, 327/110, 327/105, 327/478
• US Class Current: 333/214
• CPC Class Codes: H03H 11/48 simulating reactances

Abstract

A 1.1 GHz fully integrated GaAs MESFET active inductor is presented. Both the inductance and loss resistance are tunable with the inductance independent of series loss tuning. The measured loss resistance is tunable over a −10 Ω to +15 Ω range with a corresponding change in inductance of less than 10% at 100 MHz and less than 4% for frequencies above 500 MHz for capacitive tuning. The inductance is tunable from 65 nH to 90 nH. The measured loss resistance is shown to be dc bias voltage tunable over a 0 to +10 Ω range with an inductance tunable from 55 nH to 110 nH, with negligible interaction between loss resistance and inductance for frequencies from 100 MHz to 1.1 GHz. Several embodiments a using MESFETs and MOSFETs are described. A negative impedance converter is included to achieve increased bandwidth in all circuit realizations. Considerably larger bandwidths can be achieved depending on the fabrication technology employed and the intended application of the circuit.

Claims

1. An active inductor formed as a monolithic integrated circuit, the active inductor having an input impedance that simulates an inductance with a loss resistance, and the active inductor comprising:

a first capacitor and a second capacitor connected at a common voltage point (V₂), and each of the first capacitor and second capacitor being ungrounded; and

circuit elements arranged about the capacitors to provide voltage differentials across the capacitors, the voltage differentials being selected so that the inductance of the active inductor is tunable independently of the loss resistance of the active inductor.

2. The active inductor of claim 1 in which the circuit elements comprise:

a first controlled source connected between the first capacitor and ground;

a second controlled source connected across the first capacitor between the first controlled source and the common voltage point;

plural controlled sources arranged to provide an inverting feedback loop such that the voltage (V₁) between the first capacitor and the first controlled source has the same poles as (V₂) and

an input stage including a controlled source that sets the input impedance proportional to the difference between (V₂) and (V₁).

3. The active inductor of claim 1 or 2 in which the capacitors are variable capacitors, and the inductance is tunable by varying the capacitance of one of the first capacitor and the second capacitor.

4. The active inductor of claim 3 in which the loss resistance is tunable by varying the capacitance of the second capacitor.

5. The active inductor of claim 2 in which the circuit elements are MESFETs, the MESFETs each having a transconductance and a gate bias.

6. The active inductor of claim 5 in which the loss resistance is tunable by varying the gate bias on the first controlled source.

7. The active inductor of claim 6 in which the inductance is tunable by varying the gate bias on the controlled source in the input stage.

8. The active inductor of claim 2 in which the first controlled source, the second controlled source, the plural controlled sources arranged to form an inverting feedback loop and the controlled source in the input state are each MESFETs.

9. The active inductor of claim 1 in which the active inductor is provided with an input stage, and a negative impedance circuit is connected in parallel with the input stage.

10. The active inductor of claim 2 in which a negative impedance circuit is connected in parallel with the input stage.