Leaky lower interface for reduction of floating body effect in SOI devices

• US 6,225,667 B1
• Filed: 01/18/2000
• Issued: 05/01/2001
• Est. Priority Date: 01/18/2000
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Buynoski, Matthew S., Wollesen, Donald L.
• Primary Examiner(s): Abraham, Fetsum
• Application Number:
  US09/484,634
• Time in Patent Office: 469 Days
• Field of Search: 357/59-66, 357/347-355
• US Class Current: 257/347
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A silicon on insulator (SOI) device includes an electrically-conducting interface region along a portion of the interface between the insulator and a semiconductor layer atop the insulator. The electrically-conducting interface region provides a “leaky” electrical coupling between the body and source regions of a transistor device such as a “MOSFET”, thereby reducing floating body effects of the device. A method of forming such a semiconductor device includes forming the electrically-conducting interface region by damaging or implanting materials in the insulator and/or the semiconductor in the vicinity of the interface therebetween. The method may include producing a stepped interface region, such as by etching, in order to aid properly locating the transistor device relative to the electrically-conducting interface region.

Claims

1. A semiconductor device comprising:

an insulating layer made of insulating material;

a semiconductor layer on the insulating layer, forming an interface therebetween, the semiconductor layer being made of a semiconductor material and including a body region of a first conductivity type and a source region of a second conductivity type, the source region adjoining the body region; and

an altered interface region along at least a portion of the interface between the semiconductor region and the insulating layer, the altered interface region electrically connecting the source region and the body region.

2. The device of claim 1, wherein the altered interface region includes an insulation implant material implanted in a portion of the insulating material.

3. The device of claim 2, wherein the insulation implant material is selected from a group consisting of iron, nickel, vanadium, and titanium.

4. The device of claim 1, wherein the altered interface region includes a semiconductor implant material implanted in the semiconductor material.

5. The device of claim 4, wherein the semiconductor implant material is selected from a group consisting of germanium, xenon, antimony, and indium.

6. The device of claim 4, wherein the altered interface region is limited to a bottom portion of the semiconductor material.

7. The device of claim 1, wherein the altered interface region is along substantially all of the interface.

8. The device of claim 1, wherein the altered interface region is along a part of the interface which corresponds to the body region and the source region, and wherein the altered interface region is underneath at least part of the body region and is underneath at least part of the source region.

9. A semiconductor device comprising:

an insulating layer made of insulating material;

a semiconductor layer on the insulating layer, forming an interface therebetween, the semiconductor layer being made of a semiconductor material and including a body region of a first conductivity type and a source region of a second conductivity type, the source region adjoining the body region; and

an altered interface region along at least a portion of the interface between the semiconductor region and the insulating layer, the altered interface region electrically connecting the source region and the body region;

wherein the interface has a topographically uneven stepped region.

10. The device of claim 9, wherein the stepped region corresponds in location to the body region and the source region.

11. The device of claim 10, wherein the stepped region includes a raised region which protrudes into the body region and the source region.

12. The device of claim 10, wherein the stepped region includes a recessed region which protrudes into the insulating layer.

13. The device of claim 9, wherein the altered interface region is along a part of the interface which corresponds to the stepped region.

14. The device of claim 13, wherein the altered interface region includes an insulation implant material implanted in a portion of the insulating material.

15. The device of claim 13, wherein the altered interface region includes a semiconductor implant material implanted in the semiconductor material.

16. The device of claim 9, wherein the stepped region differs in level from the remainder of the interface region by between 500 and 1000 angstroms.

17. The device of claim 9, wherein the stepped region differs in level from the remainder of the interface region by approximately half of a thickness of the semiconductor layer.

18. The device of claim 9, wherein the altered interface region is along substantially all of the interface.