Information processing apparatus and method that uses first and second power supplies for reducing booting time

• US 6,226,740 B1
• Filed: 12/21/1998
• Issued: 05/01/2001
• Est. Priority Date: 12/19/1997
• Status: Expired due to Fees

• Current Assignee: HTC Corporation
• Original Assignee: NEC Corporation
• Inventors: Iga, Kazuhisa
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US09/216,610
• Time in Patent Office: 862 Days
• Field of Search: 713/2
• US Class Current: 713/2
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57

Abstract

A host controller performs a centralized controlled over the operation of an information processing apparatus as a whole. Codes which are read out for booting the information processing apparatus are stored in a ROM in advance. The host controller copies the contents of the ROM into a high speed storage element and reads out the storage contents of the high speed storage element to boot the apparatus when a V_CC power supply is turned on after the V_CC power supply is once turned off. This allows the apparatus to be booted based on the contents read out from the high speed storage element which can be read much faster than the ROM.

Claims

1. An information processing apparatus comprising:

a processor;

a storage device;

a first power supply coupled to the processor and the storage device;

a host controller connected to said processor and said first power supply for reading out basic input/output system codes stored in said storage device to boot the apparatus when said first power supply is turned on;

a high speed storage element which can be read out at a speed higher than that for said storage device wherein said high speed storage element is a cache memory used during a normal operation for which said first power supply is on and wherein said host controller copies the codes used for booting read out from said storage device into said high speed storage element during the period from a system terminating operation at the host controller until the time said first power supply is turned off, sets a write protect thereafter, reads the codes used for booting from said cache memory when said first power supply is turned on and cancels said write protect thereafter; and

a second power supply for supplying power to each of said host controller and said high speed storage element at all times whether said first power supply is on or off; and

wherein said host controller reads out BIOS codes stored in advance in said high speed storage element having the same storage contents as those in said storage device to boot the apparatus when said first power supply is turned on.

2. A method for booting an information processing apparatus in which a host controller connected to a processor reads out basic input/output system codes stored in a storage device to boot the apparatus when a first power supply is turned on, said method comprising the steps of:

supplying power from a second power supply to each of a high speed storage element which can be read out at a speed higher than that for said storage device and said host controller at all times whether said first power supply is on or off; and

reading out BIOS codes stored in advance in said high speed storage element having the same storage contents as those in said storage device to boot the apparatus when said first power supply is turned on; and

performing booting based on the codes used for booting read out from said storage device in a default state when said first power supply is initially turned on; and

copying the codes used for booting read from said storage device into said high speed storage element immediately before said first power supply is turned off only when a high speed boot mode is set during a subsequent normal operation.

3. A method for booting an information processing apparatus, in which a host controller connected to a processor reads out basic input/output system codes stored in a storage device to boot the apparatus when a first power supply is turned on, said method comprising the steps of:

supplying power from a second power supply to each of a high speed storage element which can be read out at a speed higher than that for said storage device and said host controller at all times whether said first power supply is on or off; and

reading out BIOS codes stored in advance in said high speed storage element having the same storage contents as those in said storage device to boot the apparatus when said first power supply is turned on;

wherein if a boot mode is set at the high speed mode during a normal operation for which said first power supply is on;

the storage contents of said high speed storage element are cleared in the period from a system terminating operation until the time at which said first power supply is turned off as a result of said system terminating operation;

a process is performed thereafter to copy the codes used for booting read out from said storage device into said high speed storage element and to set a write protect further; and

booting is performed using the codes read out from said high speed storage element and said write protect is canceled when said first power supply is turned on again thereafter.