Semiconductor memory device with improved flexible redundancy scheme

  • US 6,233,181 B1
  • Filed: 02/17/1999
  • Issued: 05/15/2001
  • Est. Priority Date: 10/15/1998
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory device, comprising:

  • a plurality of first memory blocks each having a plurality of first normal memory cells arranged in a matrix of rows and columns, each of said plurality of first memory blocks including word lines provided corresponding to said rows, respectively, and the first memory blocks aligned in the column direction; and

    a plurality of first spare memory cells arranged in a matrix of rows and columns in a particular one of said plurality of first memory blocks, each row of said plurality of first spare memory cells being capable of replacing a defective row including a defective first normal memory cell in said plurality of first memory blocks.

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