Semiconductor chip interconnect barrier material and fabrication method

  • US 6,294,836 B1
  • Filed: 12/22/1998
  • Issued: 09/25/2001
  • Est. Priority Date: 12/22/1998
  • Status: Expired due to Fees
First Claim
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1. A microelectronic semiconductor interconnect structure formed on a substrate, the interconnect structure comprising:

  • a trench feature fabricated in the substrate;

    a barrier conformally deposited on the side walls and bottom of the trench, the barrier layer comprising TaxSnyNz; and

    an overlying metallization layer deposited over the barrier layer within the trench.

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