Intelligent input and output controller for flexible interface

• US 6,298,408 B1
• Filed: 03/03/1999
• Issued: 10/02/2001
• Est. Priority Date: 03/03/1998
• Status: Expired due to Term

• Current Assignee: Hanger Solutions, LLC (IP Investments Group LLC)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Park, Seung-Kwon
• Primary Examiner(s): Myers, Paul R.
• Application Number:
  US09/261,392
• Time in Patent Office: 944 Days
• Field of Search: 710/64, 710/129
• US Class Current: 710/305
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices

Abstract

An intelligent input and output controller for flexible interface is disclosed. The present invention is comprised of a basic module for common use, input and output device interface modules for exclusive functions according to the input and output devices, and Peripheral Component Interconnect (PCI) bus connecting the basic module and the input and output device interface modules. The intelligent input and output controller is divided into a basic module and input and output device interface modules, thereby, utilizing, when developing a new input and output controller, the existing hardware to the maximum.

Claims

1. An apparatus, comprising:

a control unit being coupled to a host computer system, said control unit controlling signals input to and output from said host computer system, said control unit further comprising;

a primary interface unit being coupled to said host computer system and performing primary input/output control operations;

a plurality of secondary interface units, each one of said secondary interface units being coupled to a respective peripheral unit selected from among a plurality of peripheral units and performing particular input/output control operations and additional control operations corresponding exclusively to said respective peripheral unit; and

a Peripheral Component Interconnect bus unit coupling said primary interface unit with said plurality of secondary interface units;

said primary interface unit further comprising;

a central processing unit controlling said primary input/output control operations;

a host input/output bus interface unit being connected to said host computer system and to said central processing unit;

a modified interface unit being connected to said plurality of secondary interface units via said Peripheral Component Interconnect bus unit and being connected to said central processing unit; and

an input/output controller implementing additional functions through said modified interface unit, said additional functions being input from a user.

2. The apparatus of claim 1, said central processing unit further comprising:

a processor controlling said primary input/output control operations;

a memory storing data and being connected to said processor;

an interrupt controller being connected to said processor; and

a timer unit being connected to said processor.

3. The apparatus of claim 1, said plurality of secondary interface units being connected to said modified interface unit based on a piggy back pattern structure.

4. The apparatus of claim 1, said modified interface unit storing protocol specifications of a standard Peripheral Component Interconnect bus unit.

5. The apparatus of claim 1, said modified interface unit further comprising:

a bus interface unit, storing mechanical specifications of a piggy back pattern and protocol specifications of a standard Peripheral Component Interconnect bus, and including an additional signal line which can be modified by the user; and

a connector coupling said bus interface unit and said plurality of secondary interface units.

6. The apparatus of claim 1, said input/output controller further comprising a plurality of programmable gate arrays for said implementing of said additional functions.

7. The apparatus of claim 1, said input/output controller implementing additional operations to said modified interface unit according to said plurality of peripheral units.

8. The apparatus of claim 1, each one of said plurality of secondary interface units further comprising:

a modified interface unit being coupled with said primary interface unit via said Peripheral Component Interconnect bus unit;

an input/output peripheral controller being connected to said modified interface unit; and

a peripheral input/output interface unit being coupled with a particular peripheral unit selected from among said plurality of peripheral units and being connected to said input/output peripheral controller, said input/output peripheral controller controlling said particular peripheral unit.

9. The apparatus of claim 1, said control unit supporting a fast ethernet network when one of said plurality of secondary interface units corresponds to a fast ethernet interface unit and a pattern of said fast ethernet network is implemented in said control unit.

10. The apparatus of claim 1, said control unit supporting optical channels when one of said plurality of secondary interface units corresponds to an optical channel interface unit and a pattern of said optical channels is implemented in said control unit.

11. The apparatus of claim 1, said control unit supporting a storage device when one of said plurality of secondary interface units corresponds to a storage device interface unit and a pattern of said storage device is implemented in said control unit.

12. The apparatus of claim 1, said Peripheral Component Interconnect bus storing mechanical specifications of a piggy back pattern and protocol specifications of a standard Peripheral Component Interconnect bus, and including an additional signal line which can be modified by a user'"'"'s definition.

13. The apparatus of claim 1, said modified interface unit being connected to said primary interface unit based on a piggy back pattern structure.

14. An apparatus, comprising:

a control unit being coupled to a host computer system, said control unit controlling signals input to and output from said host computer system, said control unit further comprising;

a primary interface unit being coupled to said host computer system and performing primary input/output control operations;

a plurality of secondary interface units including a first secondary interface unit, said first secondary interface unit being coupled to a first peripheral unit selected from among a plurality of peripheral units, said first secondary interface unit performing particular input/output control operations and additional control operations corresponding exclusively to said first peripheral unit; and

a Peripheral Component Interconnect bus unit coupling said primary interface unit with said plurality of secondary interface units;

said primary interface unit further comprising;

a central processing unit controlling said primary input/output control operations;

a host input/output bus interface unit being connected to said host computer system and to said central processing unit;

a modified interface unit being connected to said plurality of secondary interface units via said Peripheral Component Interconnect bus unit and being connected to said central processing unit; and

an input/output controller implementing additional functions through said modified interface unit, said additional functions being input from a user.

15. An apparatus, comprising:

a control unit being coupled to a host computer system, said control unit controlling signals input to and output from said host computer system, said control unit further comprising;

a primary interface unit being coupled to said host computer system and performing primary input/output control operations;

a first secondary interface unit performing first particular input/output control operations and first additional control operations, said first secondary interface unit being removably connected to at least one peripheral unit, said first particular input/output control operations and first additional control operations corresponding exclusively to said at least one peripheral unit; and

a Peripheral Component Interconnect bus unit removably coupling said primary interface unit with said first secondary interface unit;

said primary interface unit further comprising;

a central processing unit controlling said primary input/output control operations;

a host input/output bus interface unit being connected to said host computer system and to said central processing unit;

a modified interface unit being removably connected to said first secondary interface unit via said Peripheral Component Interconnect bus unit and being connected to said central processing unit; and

an input/output controller implementing additional functions through said modified interface unit, said additional functions being additionally input to said control unit.

16. The apparatus of claim 15, said modified interface unit further comprising:

a bus interface unit storing protocol specifications of a standard Peripheral Component Interconnect bus and including an additional signal line which can be modified by a user; and

a connector removably coupling said bus interface unit and said first secondary interface unit.

17. The apparatus of claim 16, further comprising a second secondary interface unit performing second particular input/output control operations and second additional control operations, said second secondary interface unit being removably connected to at least one additional peripheral unit, said second particular input/output control operations and second additional control operations corresponding exclusively to said at least one additional peripheral unit.

18. The apparatus of claim 16, said first secondary interface unit corresponding to one selected from among a fast ethernet interface unit providing fast ethernet networking functions, a standard ethernet interface unit providing standard ethernet networking functions, an optical channel interface unit providing optical channel communication functions, and a storage device interface unit providing data storage functions.

19. An apparatus, comprising:

a control unit being coupled to a host computer system, said control unit controlling signals input to and output from said host computer system, said control unit further comprising;

a primary interface unit being coupled to said host computer system and performing primary input/output control operations;

a plurality of secondary interface units, each one of said secondary interface units being coupled to a respective peripheral unit selected from among a plurality of peripheral units and performing particular input/output control operations and additional control operations corresponding exclusively to said respective peripheral unit; and

a Peripheral Component Interconnect bus unit coupling said primary interface unit with said plurality of secondary interface units;

at least one of said plurality of secondary interface units being connected to said primary interface unit based on a piggy back pattern structure.

20. The apparatus of claim 19, said primary interface unit further comprising:

a central processing unit controlling said primary input/output control operations;

a host input/output bus interface unit being connected to said host computer system and to said central processing unit;

a modified interface unit being connected to said plurality of secondary interface units via said Peripheral Component Interconnect bus unit and being connected to said central processing unit; and

an input/output controller implementing additional functions through said modified interface unit, said additional functions being input from a user.

21. The apparatus of claim 20, said modified interface unit further comprising:

a bus interface unit, storing mechanical specifications of the piggy back pattern and protocol specifications of a standard Peripheral Component Interconnect bus, and including an additional signal line which can be modified by the user; and

a connector coupling said bus interface unit and said plurality of secondary interface units.