Resin-sealed power semiconductor device including substrate with all electronic components for control circuit mounted thereon

• US 6,313,520 B1
• Filed: 09/18/2000
• Issued: 11/06/2001
• Est. Priority Date: 03/07/2000
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Kawafuji, Hisashi, Yoshida, Takanobu, Shinohara, Toshiaki
• Primary Examiner(s): Clark, Sheila V.
• Application Number:
  US09/664,341
• Time in Patent Office: 414 Days
• Field of Search: 257/666, 257/676, 257/691, 257/723, 257/724, 257/686
• US Class Current: 257/676
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4911 the connectors being bonded to at least one common bonding area, e.g. daisy chain
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19104 : on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/19107 : off-chip wires

Abstract

A resin-sealed power semiconductor device is provided. The thicknesses of a die pad (19) and a lead part (2) are made equal and as great as possible. A thick film substrate (8) is bonded with a bonding layer (20) onto a plurality of supporting inner leads (2AS) among first inner leads (2A1) positioned above the die pad (19). Patterns of a control circuit of power semiconductor elements (1) are formed as thick film patterns (10) on an upper surface of the substrate (8), and a control circuit element (IC) (9) and all electronic components (12) are mounted on the patterns (10) by soldering. The constituents (9, 12, 10, 8, 1, 2A1, 19, 2B1) are sealed in a sealing resin (5). The resin-sealed power semiconductor device improves noise immunity while conventionally effectively dissipating heat generated by the power semiconductor elements, and is designed to be adaptable to increase in functionality thereof.

Claims

1. A resin-sealed power semiconductor device comprising:

a frame part comprising a lead part having a plurality of inner leads and a plurality of outer leads continuous respectively with said plurality of inner leads, and a die pad equal in thickness to said lead part;

a power semiconductor element mounted on a portion of said die pad;

a substrate bonded onto a support of said frame part except said portion of said die pad;

a pattern of a control circuit of said power semiconductor element, said control circuit pattern being formed on at least a first main surface of said substrate;

a semiconductor element mounted on said control circuit pattern for controlling said power semiconductor element;

electronic components all mounted on said control circuit pattern and constituting said control circuit in conjunction with said semiconductor element; and

a sealing resin for sealing therein said plurality of inner leads, said die pad, said power semiconductor element, said substrate, said semiconductor element and all of said electronic components.

2. The resin-sealed power semiconductor device according to claim 1,

wherein said support of said frame part comprises at least two supporting inner leads among said plurality of inner leads.

3. The resin-sealed power semiconductor device according to claim 2,

wherein said substrate is a ceramic substrate, and

wherein said control circuit pattern is a thick film pattern.

4. The resin-sealed power semiconductor device according to claim 2,

wherein said substrate is a glass epoxy substrate.

5. The resin-sealed power semiconductor device according to claim 2,

wherein said substrate comprises a plurality of through hole parts equal in number to said at least two supporting inner leads;

wherein a conducting pattern is provided for each of said through hole parts and formed on a wall surface of each of said through hole parts and on portions of said first main surface and a second main surface of said substrate which surround each of said through hole parts; and

wherein a portion of said conducting pattern on said second main surface is bonded with a conductive bonding layer to an associated one of said at least two supporting inner leads.

6. The resin-sealed power semiconductor device according to claim 5,

wherein said substrate is a glass epoxy substrate.

7. The resin-sealed power semiconductor device according to claim 2,

wherein said support comprises supporting inner leads adjacent to each other.

8. The resin-sealed power semiconductor device according to claim 1,

wherein said support of said frame part corresponds to another portion of said die pad.

9. The resin-sealed power semiconductor device according to claim 1,

wherein said support of said frame part comprises first and second supporting inner leads among said plurality of inner leads;

wherein at least one intermediate inner lead among said plurality of inner leads which is present between said first and second supporting inner leads is shorter than said first and second supporting inner leads;

wherein said substrate includes

a first end portion supported by said first supporting inner lead, with a bonding layer therebetween,

a second end portion opposite from said first end, portion and supported by said second supporting inner lead, with said bonding layer therebetween, and

third and fourth end portions opposite from each other and orthogonal to said first and second end portions, said third and fourth end portions being unsupported by said at least one intermediate inner lead;

wherein said control circuit pattern includes a first control circuit pattern formed on a first main surface of said substrate, and a second control circuit pattern formed on a second main surface of said substrate, said second main surface being opposite from said first main surface; and

wherein said semiconductor element and some of said electronic components are mounted on said first control circuit pattern, and the remainder of said electronic components are mounted on said second control circuit pattern.

10. The resin-sealed power semiconductor device according to claim 9,

wherein said substrate is a glass epoxy substrate.