System for implementing intelligent I/O processing in a multi-processor system by redirecting I/O messages to a target central processor selected from the multi-processor system

• US 6,321,279 B1
• Filed: 09/14/1998
• Issued: 11/20/2001
• Est. Priority Date: 09/14/1998
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Bonola, Thomas J.
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): ELAMIN, ABDELMONIEM I
• Application Number:
  US09/152,997
• Time in Patent Office: 1,163 Days
• Field of Search: 710/36, 710/40, 710/64, 709/102, 709/105
• US Class Current: 710/36
• CPC Class Codes: G06F 13/124 where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
• CPC Class Codes: G06F 2209/542 Intercept
• CPC Class Codes: G06F 9/546 Message passing systems or structures, e.g. queues

Abstract

A software program is used in conjunction with a standard general purpose multi-processor computer system as a means of implementing an I₂O-compliant input-output processor (“IOP”) without requiring a special hardware IOP processor embedded on a PCI device card and connected to a computer system PCI bus. At least one of the multi-processor is targeted for operating a special software operating system module. The special software operating system module is capable of emulating the I₂O-compliant input-output operating system program. This enables the targeted CPU to act as a virtual IOP. A driver software module is inserted into the operating system during computer system initialization which causes the software operating system to operate as if it is communicating with a physical IOP installed on a PCI bus, but instead the driver software module is redirecting the message to one of the virtual IOPs, thus making operation of the computer system indistinguishable from messages that would have been processed by a hardware implemented IOP in a computer system. Legacy computers may also implement I₂O functionality without needing to be PCI bus configured, nor requiring special hardware IOP.

Claims

1. A computer system having a plurality of central processing units, a host bus, a host operating system, system memory, at least one input-output bus connected to said host bus, at least one device driver module, and at least one input-output device connected to said input-output bus, said computer system comprising:

at least one operating system module, said operating system module contained within said host operating system, said operating system module capable of sending and receiving messages from said host bus and said host operating system;

a target central processor unit selected from said plurality of said central processor units; and

at least one message handler, said message handler capable of intercepting and redirecting said messages directed either to or from said operating system module;

wherein said message handler intercepts said messages directed either to or from said operating system module and redirects said messages to said target central processor units thereby allowing said target central processor unit to handle said messages.

2. The computer system of claim 1, further comprising an input-output real time operating system executing on said target central processor unit to form a virtual input-output processor.

3. The computer system of claim 2, wherein said real-time input-output operating system complies with an I₂O standard real-time operating system.

4. The computer system of claim 2, further comprising said virtual input-output processor has a wrapper for said real-time input-output operating system.

5. The computer system of claim 2, wherein said operating system module complies with an I₂O standard.

6. The computer system of claim 2, wherein said at least one device driver module executes within said virtual input-output processor.

7. The computer system of claim 2, further comprising a startup function for said virtual input-output processor.

8. The computer system of claim 2, further comprising an initialization function for said virtual input-output processor.

22. The computer system of claim 2, further comprising an installation function for said virtual input-output processor.

9. A method of enabling an input-output message handler on a computer system having a plurality of central processing units, a host bus, a system memory, a host operating system, at least one device driver module, at least one input-output device, at least one input-output bus connecting said input-output device to said host bus, and a real-time input-output operating system program, said real-time input-output operating system program capable of handling messages between said at least one input-output device and said host operating system, said method comprising the steps of:

(a) initializing a virtual input-output processor operating system program on any one of said plurality of central processing units, said virtual input-output processor operating system program capable of executing said real-time input-output operating system program;

(b) launching said virtual input-output processor operating system on said any one of said plurality of central processing units to form a virtual input-output processor; and

(c) executing said real-time input-output operating system program on said virtual input-output processor, wherein said real-time input-output operating system program handles messages between said input-output devices and said host operating system.

10. The method of claim 9, wherein said virtual input-output processor complies with an I₂O standard.

11. A method of enabling an input-output massage handler on a computer system having at least two central processing units, a host bus, a system memory, a host operating system, said host operating system executing on a first one of said two central processing units, at least one input-output device, at least one device driver module for said input-output device, at least one input-output bus connecting said input-output device to said host bus, and a real-time input-output operating system program, said method comprising the steps of:

(a) initializing a virtual input-output processor driver on the first one of said at least two central processing units;

(b) initializing a virtual input-output processor operating system program on a second one of said at least two central processing units selected therefrom;

(c) launching said virtual input-output processor operating system program to form a virtual input-output processor, said virtual input-output processor capable of executing said real-time input-output operating system program; and

(d) starting said virtual input-output processor driver, said virtual input-output driver capable of redirecting messages either to or from said input-output devices to said virtual input-output processor;

wherein said real-time input-output operating system program handles said messages.

12. The method of claim 11, wherein said virtual input-output processor complies with an I₂O standard.

13. A method of enabling an input-output message handler on a computer system having a plurality of central processing units, a host bus, system memory, a host operating system, at least one device driver module, at least one input-output device, at least one input-output bus connecting said input-output device to said host bus, said input-output bus having a plurality of slots, and a real-time input-output operating system program, said real-time input-output operating system program capable of handling messages between said at least one input-output device and said host operating system, said method comprising the steps of:

(a) determining the number of central processing units on said computer system;

(b) determining the context of said operating system in order to obtain context sensitive information;

(c) targeting at least one of said central processing units for input-output processing to form a target central processor unit;

(d) initializing a virtual input-output processor operating system program each of said target central processing units to form at least one virtual input-output processor, said virtual input-output processor operating system program capable of executing said real-time input-output operating system program;

(e) initializing a virtual input-output processor driver;

(f) launching all of said virtual input-output processors; and

(g) starting said virtual input-output processor driver, said virtual input-output processor driver capable of intercepting and redirecting said messages to said virtual input-output processors;

wherein said real-time input-output operating system programs on said virtual input-output processors handle messages between said at least one input-output device driver and said virtual input-output processor driver.

14. The method of claim 13, wherein said step of initializing said virtual input-output processor driver comprises the steps of:

(ca) allocating memory to form a shared memory region; and

(cb) scanning a hardware abstraction layer for processor control registers.

15. The method of claim 13, wherein said step of launching all of said virtual input-output processors comprises the steps of:

(da) initializing each of said target central processor units; and

(db) starting each of said target central processor units.

16. The method of claim 13, wherein said step of starting said virtual input-output processor driver comprises the steps of:

(ea) saving at least one entry point in an interrupt dispatch table;

(eb) patching said entry points into a code space of a dispatch routine;

(ec) verifying an inter-processor interrupt code and an end of interrupt code for said computer system;

(ed) connecting at least one interrupt handler of said virtual input-output processor driver with said inter-processor interrupt code and said end of interrupt code;

(ee) mapping a virtual adapter memory region of said shared memory and marking a first page of said virtual adapter memory region not-present;

(ef) determining which of said slots of said input-output bus will be used to report back to said device driver module;

(eg) scanning space in said shared memory for configuration information related to said input-output devices;

(eh) placing said configuration information into each of said virtual adapter memory region of said shared memory;

(ei) placing hooks into a kernel of said operating system and into at least one hardware abstraction layer routines of said operating system necessary to intercept input-output related calls; and

(ej) kicking off said virtual input-output processor driver with a no operation message.

17. The method of claim 15, wherein said step of initializing each of said target central processor units comprises the steps of:

(daa) allocating memory for an real-time input-output operating system executive function array and then building said executive function array;

(dab) checking to verify if any of said virtual input-output processor has been initialized and, if not, then;

(daba) extracting virtual input-output processor information from said shared memory;

(dabb) extracting a heap from said shared memory and initializing said heap;

(dabc) setting up a virtual input-output processor data area;

(dabd) filling in configuration space information about said input-output devices for said virtual input-output processors at a configuration space in said shared memory; and

(dabe) passing back a physical address of said shared memory to said configuration space;

(dac) allocating memory for at least one virtual inbound FIFO and at least one virtual outbound FIFO in said heap;

(dad) initializing said virtual inbound FIFO and said virtual outbound FIFO;

(dae) filling said virtual inbound FIFO and said virtual outbound FIFO with an available message frame;

(daf) creating a list of active event queues; and

(dag) allocating resources required to implement said real-time input-output operating system program on said virtual input-output processor.

18. The method of claim 15, wherein said step of starting each of said target central processor units comprises the steps of:

(dba) for each virtual input-output processor, verifying if each of said virtual input-output processors has been initialized, and, if not, then

(dbaa) determining if a go message was received from said virtual input-output processor driver, and, if not, then waiting and rechecking until said go message is received;

(dbab) initializing an adapter table for each available adapter;

(dbac) allocating a message frame and constructing a device attach message;

(dbad) posting said device attach message to an executive function;

(dbae) indicating that said initialization is complete; and

(dbb) handling interrupt requests.

19. The method of claim 18, wherein said step of handling interrupt requests comprises the steps of:

(dbba) determining if an incoming signal is an interrupt request and, if so, executing an assert process;

(dbbb) grabbing an event object;

(dbbc) determining whether said grabbed event object is a free event object, and, if so then

(dbbca) removing an inbound message frame;

(dbbcb) verifying if said inbound message frame was removed, and, if not, placing said free event object onto said free event list, otherwise posting said event object to a target event queue;

(dbbd) grabbing a next active event queue;

(dbbe) determining if said step of grabbing said next active event queue was successful, if not then jumping to step (dbba);

(dbbf) grabbing an event of highest priority;

(dbbg) determining if said step of grabbing said event of highest priority was successful, if not, then placing said event object onto said active event queue and jumping to step (dbba);

(dbbh) dispatching said event of highest priority;

(dbbi) placing said free event object onto said free event list; and

(dbbj) placing said event queue onto said active event queue list.

20. The method of claim 17, wherein said step of creating a list of active event queues comprises the steps of:

(dafa) creating an active event queue list;

(dafb) allocating memory to a heap of said in said shared memory;

(dafc) initializing said active event queue;

(dafd) creating a free events list; and

(dafe) filling said free event list with available event objects.

21. The method of claim 17, wherein said step of allocating resources required to implement said real-time input-output operating system program on said virtual input-output processor comprises the steps of:

(daga) creating an event queue for said executive function;

(dagb) creating a dispatch table for said executive function; and

(dagc) creating and initializing a device object of said executive function.