Display control circuit

  • US 6,340,959 B1
  • Filed: 11/19/1998
  • Issued: 01/22/2002
  • Est. Priority Date: 11/19/1997
  • Status: Expired due to Term
First Claim
Patent Images

1. A display control circuit, which carries out the same image display simultaneously on a non-interlace matrix display device and on an interlace television receiver through a digital encoder, comprising:

  • common storage means for storing RGB data to produce identical displays on the matrix display device and the television receiver simultaneously; and

    single reading means for reading the RGB data from the storage means and for outputting respective first and second control signals related to the displays on the matrix display device and the digital encoder, wherein, when there is a specific relationship between the number of scanning lines of the matrix display and the number of effective scanning lines of the television receiver, the reading means outputs the same RGB data read from the storage means to the matrix display device and the digital encoder after a predetermined time period has elapsed from receipt of a vertical synchronous signal, and also outputs the first and second control signals individually.

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