Phase locked loop with high-speed locking characteristic

  • US 6,346,861 B2
  • Filed: 12/07/2000
  • Issued: 02/12/2002
  • Est. Priority Date: 06/08/2000
  • Status: Expired due to Term
First Claim
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1. A phase/frequency detector for comparing a phase/frequency of a reference signal having a reference frequency and that of a feedback signal having a feedback frequency in a phase locked loop (PLL), comprising:

  • a NAND gate logic circuit for NANDing a first signal first signal and a second signal to output a NANDed signal;

    a first latch means for latching the NANDed signal and outputting the first signal in response to the reference signal; and

    a second latch means for latching the NANDed signal and outputting the second signal in response to the feedback signal.

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