Method for manufacturing a gate structure incorporated therein a high K dielectric

• US 6,355,548 B1
• Filed: 11/28/2000
• Issued: 03/12/2002
• Est. Priority Date: 12/22/1999
• Status: Expired due to Term

• Current Assignee: Intellectual Discovery Co., Ltd.
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Park, Dae-Gyu
• Primary Examiner(s): Christian, Keith
• Assistant Examiner(s): Chen, Jack
• Application Number:
  US09/722,465
• Time in Patent Office: 469 Days
• Field of Search: 438/240, 438/261, 438/263, 438/264, 438/287, 438/299, 438/509, 438/584, 438/585, 438/591, 438/594
• US Class Current: 438/591
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02205 the layer being characterised by the precursor material for deposition
• CPC Class Codes: H01L 21/02266 deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/02301 in-situ cleaning
• CPC Class Codes: H01L 21/02307 treatment by exposure to a liquid
• CPC Class Codes: H01L 21/02312 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/02326 into a nitride layer, e.g. changing SiN to SiON
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/31683 of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
• CPC Class Codes: H01L 21/318 composed of nitrides
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method for forming a gate structure begins by preparing a semiconductor substrate provided with an isolation region formed therein. An AlN layer is formed on top of the semiconductor substrate and annealed in the presence of oxygen gas to convert into an Al₂O₃ layer. Thereafter, a conductive layer is formed on top of the Al₂O₃ layer. Finally, the conductive layer and the Al₂O₃ layer are patterned into the gate structure.

Claims

1. A method for manufacturing a gate structure for use in a semiconductor device, the method comprising:

a) preparing a semiconductor substrate provided with an isolation region formed therein;

b) forming an aluminum nitride (AlN) layer on top of the semiconductor substrate;

c) annealing the AlN layer to convert the AlN layer into an aluminum oxide (Al₂O₃) layer;

d) forming a conductive layer on top of the Al₂O₃ layer; and

e) patterning the conductive layer and the Al₂O₃ layer into the gate structure.

2. The method of claim 1, wherein forming the AlN layer comprises using a low density glow plasma to remove nitrogen vacancies from the AlN layer.

3. The method of claim 1, wherein annealing the AlN layer comprises annealing at a temperature ranging from approximately 450°

C. to approximately 850°

C. in an oxygen gas atmosphere for approximately 30 minutes to convert a dangled Al into Al₂O₃.

4. The method of claim 1, wherein the isolation region is in the form of one of a local oxidation of silicon (LOCOS) or a shallow trench isolation (STI).

5. The method of claim 1, further comprising, subsequent to said preparing, cleaning a surface of the semiconductor substrate by using a chemical to remove an undesired silicon dioxide (SiO₂).

6. The method of claim 5, wherein the chemical is a piranha.

7. The method of claim 5, wherein the chemical is prepared by mixing ammonium hydroxide (NH₄OH), hydrogen peroxide (H₂O₂) and deionized (DI) water.

8. The method of claim 5, wherein the cleaning comprises cleaning a temperature ranging from approximately 850°

C. to approximately 950°

C. in ultra high vacuum (UHV).

9. The method of claim 5, wherein the cleaning comprises cleaning in a hydrogen gas atmosphere.

10. The method of claim 5, wherein forming the AlN layer comprises using a reactive sputtering which utilizes N₂/Ar gas and a pure Al as a target.

11. The method of claim 10, wherein the reactive sputtering comprises using a radio frequency (RF) glow plasma.

12. The method of claim 11, wherein a power density of the RF glow plasma ranges from approximately 100 W to approximately 5,000 W for an 8 inch wafer.

13. The method of claim 10, wherein the reactive sputtering comprises using a direct current (DC) magnetron plasma.

14. The method of claim 13, wherein a power density of the DC magnetron plasma ranges from approximately 100 W to approximately 5,000 W for an 8 inch wafer.

15. The method of claim 10, wherein an N₂ flow rate ranges from approximately 10 sccm to approximately 100 sccm, an Ar flow rate ranges from approximately 10 sccm to approximately 45 sccm and a deposition temperature ranges from approximately −

25°

C. to approximately 750°

C.

16. The method of claim 5, wherein forming the AlN layer comprises using a reactive sputtering which utilizes doped Al as a target.

17. The method of claim 16, wherein the doped Al is doped with Si.

18. The method of claim 1, wherein a thickness of the AlN layer ranges from approximately 15 Å

to approximately 100 Å

.

19. The method of claim 1, wherein annealing the AlN layer comprises using a rapid thermal process (RTP) at a temperature ranging from approximately 450°

C. to approximately 900°

C. in a presence of oxygen gas for approximately 30 minutes.

20. The method of claim 1, wherein preparing the semiconductor substrate comprises using a sputtering which utilizes Ar gas and AlN as a target.

21. The method of claim 1, wherein preparing the semiconductor substrate comprises using a chemical vapor deposition (CVD) method which utilizes an inorganic material as a source.

22. The method of claim 21, wherein the CVD method utilizes as a precursor at least one material selected from a group consisting of AlCl₃, di methyl aluminum hydride (DMAH), NH₃, hydrogen (H₂), and nitrogen (N₂).

23. The method of claim 22, wherein the CVD method comprises using a temperature ranging from approximately 450°

C. to approximately 750°

C.

24. The method of claim 1, wherein preparing the semiconductor substrate comprises using a CVD method which utilizes a metal organic material as a source.

25. The method of claim 24, wherein the CVD method comprises using as a precursor at least one material selected from a group consisting of trimethyl aluminum (TMA), NH₃, hydrogen (H₂), and nitrogen (N₂).

26. The method of claim 1, wherein the gate structure comprises at least one material selected from a group consisting of a poly-silicon, W-polycide, Ti-polycide, Mo-polycide, and W.