Interface and process for handling out-of-order data transactions and synchronizing events in a split-bus system

  • US 6,363,466 B1
  • Filed: 09/13/1999
  • Issued: 03/26/2002
  • Est. Priority Date: 09/13/1999
  • Status: Expired due to Term
First Claim
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1. In a computer system, a method of processing memory access requests generated by a master device, said method comprising the steps of:

  • a) receiving a first plurality of memory access requests generated by said master device;

    b) upon receiving a first synchronizing request from said master device, presenting a first plurality of memory access requests to a memory access request arbiter in parallel for re-ordering thereof;

    c) receiving a second plurality of memory access requests generated by said master device when said first plurality of memory access requests are serviced by said memory access request arbiter;

    d) processing said first synchronizing request after said first plurality of memory access requests have been completed; and

    e) upon receiving a second synchronizing request from said master device, presenting said second plurality of memory access requests to said memory access request arbiter in parallel for re-ordering thereof.

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