Differential capacitance sampler

• US 6,366,099 B1
• Filed: 12/21/1999
• Issued: 04/02/2002
• Est. Priority Date: 12/21/1999
• Status: Expired due to Fees

• Current Assignee: Conrad Technologies Incorporated
• Original Assignee: Conrad Technologies Incorporated
• Inventors: Reddi, M. Mahadeva
• Primary Examiner(s): Metjahic, Safet
• Assistant Examiner(s): SUNDARAM, T R
• Application Number:
  US09/468,139
• Time in Patent Office: 833 Days
• Field of Search: 324/678, 324/658, 324/660, 324/725, 324/706, 324/686
• US Class Current: 324/678
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24

Abstract

Differential capacitance is sensed by charging two capacitors to a voltage equal in magnitude but opposite in polarity during a short sampling period and discharging them in parallel during the remaining longer period of a pulse repetition cycle. In the preferred embodiment, an operational amplifier converts the charge difference to a voltage output signal. In an embodiment suitable for transducers, high sensitivity and low noise performance is obtained because of the output signal provided by the sensor is directly proportional to the excitation voltage, the excitation frequency and the value of a feedback resistor. This embodiment is also useful for proximity sensing in the presence of moisture and other ionic conductors, because the charging pulse can be of a short duration, typically 100 ns or less. An alternate embodiment, having a sensitivity that is independent of excitation frequency, provides a voltage output signal that is linearly related to the displacement of the central plate of a three-plate capacitor.

Claims

1. A differential capacitance sampler, comprising:

a balanced pulse generator which concurrently produces first and second complementary charging pulses at respective first and second terminals, wherein the first charging pulse is a positive-going pulse and the second charging pulse is a negative-going pulse;

a bridge circuit having a first branch and a second branch connected between a first node coupled to the first terminal of the balanced pulse generator and a second node coupled to the second terminal of the balanced pulse generator, and including a differential capacitance, the bridge circuit producing an output signal in response to the charging pulses of the pulse generator, which output signal changes in value due to changes in the differential capacitance; and

a signal processor which processes the output signal of the bridge circuit to provide an output signal of the differential capacitance sampler.

2. A sampler according to claim 1 wherein the duty cycle of the pulse generator is less than 50%.

3. A sampler according to claim 2 wherein:

the first branch comprises first and second resistors connected in series at a third node, the second branch comprises at least one capacitor which forms the differential capacitance; and

the signal processor is an amplifier connected to amplify signals at the third node of the bridge circuit.

4. A sampler according to claim 3 wherein the second branch of the bridge circuit comprises first and second capacitors connected in series at a fourth node that is connected to a source of reference potential.

5. A sampler according to claim 4 further including a third capacitor connected in parallel with the serially connected first and second capacitors.

6. A sampler according to claim 3 wherein the second branch of the bridge circuit comprises a single capacitor having first and second plates connected between the first node and the second node, wherein an environment surrounding the single capacitor forms a further capacitor with at least one of the first and second plates.

7. A sampler according to claim 3 additionally comprising:

a first diode having an anode and a cathode, the anode of the first diode being connected to the first terminal of the pulse generator and the cathode of the first diode being connected to the first node; and

a second diode having an anode and a cathode, the cathode of the second diode being connected to the second terminal of the pulse generator and the anode of the second diode being connected to the second node.

8. A sampler according to claim 3 further including:

a first direct current (DC) voltage source having a first polarity;

a second DC voltage source having a second polarity opposite to the first polarity;

a first analog switch coupled between the first DC voltage source and the first node, the first analog switch having a control terminal coupled to receive the charging pulses provided by the pulse generator, the charging pulses causing the first analog switch to close during a sampling period; and

a second analog switch coupled between the second DC voltage source and the second node, the second switch having a control terminal coupled to receive the charging pulses provided by the pulse generator, the charging pulses causing the second analog switch to close during the sampling period.

9. A sampler according to claim 2 wherein the pulse generator comprises a square wave oscillator which provides a square-wave output signal, and the sampler further comprises:

a first logic inverter circuit, coupled to receive the square-wave output signal, to provide an output signal that is a logic-inverse of the square-wave output signal; and

a second logic inverter circuit, coupled to receive the output signal of the first logic inverter circuit, to provide an output signal that is a logic-inverse of the output signal of the first logic inverter circuit;

wherein, the output signals of the first and second logic inverter circuits are pulse trains having amplitudes that are approximately equal in magnitude and approximately 180°

out of phase.

10. A sampler according to claim 2 wherein:

the pulse generator comprises a square wave oscillator which provides a square-wave output signal, and the sampler further comprises;

a first direct current (DC) voltage source which provides an output signal having a magnitude and polarity;

a second DC voltage source which provides an output signal having a magnitude approximately equal to the magnitude of the output signal of the first DC voltage source and a polarity that is approximately opposite to the polarity of the output signal of the first DC voltage source;

a first resistor having first a nd second terminal s, the first terminal of the first resistor being connected to the first DC voltage source;

a second resistor having first and second terminals, the first terminal of the second resistor being connected to the second DC voltage source; and

an analog switch having a first terminal connected to the second terminal of the first resistor, a second terminal coupled to the second terminal of the second resistor, and a control terminal coupled to the pulse generator;

whereby output signals provided at the first and second terminals of the analog switch provide respective pulse trains that are approximately equal in magnitude and approximately opposite in phase.

11. A method for sampling a difference in capacitance between at least two capacitors comprising the steps of:

charging each of the at least two capacitors of a bridge circuit, during a sampling period, to respective voltages that are substantially equal in magnitude but substantially opposite in polarity;

allowing the at least two capacitors to discharge during a discharge period which follows the sampling period to produce respective discharge voltage signals;

measuring a sum of the discharge voltage signals during the discharge period to provide a measure of the difference in capacitance between the at least two capacitors.

12. A method according to claim 11 wherein the step of charging each of the at least two capacitors includes the step of applying a charging pulse having a duty cycle of less than 50% to the at least two capacitors.

13. A method according to claim 11 wherein the step of measuring the sum of the discharge voltages comprises the steps of:

combining the discharge voltage signals to form a summed discharge voltage signal;

amplifying the summed discharge voltage signal; and

integrating the amplified summed discharge voltage signal to provide the measure of the difference in capacitance between the at least two capacitors.

14. A method according to claim 13 wherein one of the at least two capacitors is an environmental capacitance formed with one capacitor of the at least two capacitors and the step of charging each of the at least two capacitors includes the step of charging the one capacitor to charge both the one capacitor and the environmental capacitance.

15. A differential capacitance sampling array, comprising:

a plurality of differential capacitance samplers, each sampler including;

a balanced pulse generator which concurrently produces first and second complementary charging pulses at respective first and second terminals, wherein the first charging pulse is a positive-going pulse and the second charging pulse is a negative-going pulse;

a bridge circuit having a first branch and a second branch connected between a first node coupled to the first terminal of the balanced pulse generator and a second node coupled to the second terminal of the balanced pulse generator, and including a differential capacitance, the bridge circuit producing an output signal in response to the charging pulses of the pulse generator, which output signal changes in value due to changes in the differential capacitance; and

a signal processor which processes the output signal of the bridge circuit to provide an output signal of the differential capacitance sampler;

wherein the periodic charging pulses produced by the balanced pulse generators of the plurality of differential capacitance samplers have identical frequencies but respectively different phases.