Method of fabricating an antifuse element

  • US 6,368,900 B1
  • Filed: 02/11/2000
  • Issued: 04/09/2002
  • Est. Priority Date: 02/11/2000
  • Status: Expired due to Term
First Claim
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1. A method of forming an antifuse element, on a semiconductor substrate, comprising the steps of:

  • providing a conductive region, comprised with a body of gate array devices;

    forming a via hole, in a first insulator layer, exposing a portion of said conductive region;

    forming a metal plug structure, comprised with a smooth top surface, in said via hole;

    removing a top portion of said first insulator layer, resulting in a raised portion of said metal plug structure, protruding upward from the top surface of the etched back, insulator layer;

    forming conductive spacers only on the sides of said raised portion of said metal plug structure;

    depositing an amorphous silicon layer, overlying said smooth top surface of said metal structure;

    depositing a titanium nitride layer on said amorphous silicon layer; and

    patterning of said titanium nitride layer, and of said amorphous silicon layer to form said antifuse element, comprised of said amorphous silicon layer, located underlying said titanium nitride layer.

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