Semiconductor device having uniform spacers

CAFC
  • US 6,380,588 B1
  • Filed: 05/09/2000
  • Issued: 04/30/2002
  • Est. Priority Date: 12/18/1997
  • Status: Expired due to Term
First Claim
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1. A semiconductor device arrangement comprising a semiconductor substrate having a mixture of operational gate arrangements and non-operational gate arrangements on a surface of the substrate, the space between said gate arrangements being substantially the same distance, each operational and non-operational gate arrangement having dielectric spacers which are of uniform shape and size, each spacer having substantially the same width and physically contacting the substrate, wherein removal of the non-operational gate arrangements provides operational gate arrangements on said substrate having uniformly sized spacers and different distances between the operational gate arrangements.

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