Method for forming a reduced thickness packaged electronic device

• US 6,399,418 B1
• Filed: 07/26/2001
• Issued: 06/04/2002
• Est. Priority Date: 07/26/2001
• Status: Active Grant

• Current Assignee: Amkor Technology Singapore Holding Pte., Ltd. (Amkor Technology Incorporated)
• Original Assignee: Amkor Technology Incorporated
• Inventors: Hollaway, Roy Dale, Glenn, Thomas P., Webster, Steven
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Dang, Phuc T.
• Application Number:
  US09/916,719
• Time in Patent Office: 313 Days
• Field of Search: 438/106, 438/108, 438/110, 438/112, 438/113, 438/124, 438/126, 438/127
• US Class Current: 438/106
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85001 involving a temporary auxiliary member not forming part of the bonding apparatus, e.g. removable or sacrificial coating, film or substrate
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14625 : Optical elements or arrangements associated with the device
• CPC Class Codes: H01L 27/14683 : Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/00015 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15183 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15184 : in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18165 : of a wire bonded chip
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 31/0203 : Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80
• CPC Class Codes: H01L 31/02327 : the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H01L 31/18 : Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

An electronic device, such as a sensor die, is packaged by first forming a hole through a substrate. The hole is made large enough to position the entire electronic device within the hole. A tape is then applied to the second surface of the substrate to cover a second side of the hole, thereby creating a tape surface at the bottom of the hole. The electronic device is then positioned within the hole such that the electronic device is in contact with, and adhered to, the tape surface at the bottom of the hole. Electronic connections are made between the electronic device and the substrate and a layer of encapsulant is applied.

In one embodiment, the electronic device is a sensor die and an optical element is positioned over an active region of the sensor die before the encapsulant is applied. The encapsulant then surrounds and holds the optical element in position over the active region of the sensor die.

Claims

1. A method for packaging an electronic device comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing an electronic device, said electronic device comprising an electronic device first surface and an electronic device second surface, opposite said electronic device first surface;

forming a hole in said substrate first surface, said hole comprising hole sides and a hole bottom surface, said hole bottom surface being large enough to position said second surface of said electronic device on said hole bottom surface;

positioning said electronic device in said hole with said second surface of said electronic device on said hole bottom surface such that a distance between said second surface of said electronic device and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

electrically coupling said electronic device to said substrate with electrical connections;

applying a layer of encapsulant to;

said first surface of said electronic device;

said first surface of said substrate; and

said electrical connections; and

filling gaps between said electronic device and said hole sides with said encapsulant.

2. The method of claim 1, wherein;

said electrical connections comprise bond wires.

3. The method of claim 1, wherein;

said electronic device is an integrated circuit.

4. A method for packaging an integrated circuit comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing an integrated circuit chip, said integrated circuit chip comprising an integrated circuit chip first surface and an integrated circuit chip second surface, opposite said integrated circuit chip first surface;

forming a hole in said substrate first surface, said hole comprising hole sides and a hole bottom surface, said hole bottom surface being large enough to position said second surface of said integrated circuit chip on said hole bottom surface;

positioning said integrated circuit chip in said hole with said second surface of said integrated circuit chip on said hole bottom surface such that a distance between said second surface of said integrated circuit chip and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

electrically coupling said integrated circuit chip to said substrate with bond wires;

applying a layer of encapsulant to;

said first surface of said electronic device;

said first surface of said substrate; and

said bond wires; and

filling gaps between said integrated circuit chip and said hole sides with said encapsulant.

5. A method for packaging an electronic device comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing an electronic device, said electronic device comprising an electronic device first surface and an electronic device second surface, opposite said electronic device first surface;

forming a hole through said substrate, said hole extending from said substrate first surface to said substrate second surface, said hole comprising hole sides, said hole being large enough to position said second surface of said electronic device in said hole;

applying tape to said second surface of said substrate, said tape covering said hole and thereby forming a hole bottom surface comprising a portion of said tape;

positioning said electronic device in said hole with said second surface of said electronic device on said hole bottom surface such that a distance between said second surface of said electronic device and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

electrically coupling said electronic device to said substrate with electrical connections;

applying a layer of encapsulant to;

said first surface of said electronic device;

said first surface of said substrate; and

said electrical connections;

filling gaps between said electronic device and said hole sides with said encapsulant;

allowing said encapsulant to harden; and

removing said tape from said second surface of said substrate.

6. The method of claim 5, wherein;

said electrical connections comprise bond wires.

7. The method of claim 5, wherein;

said electronic device is an integrated circuit.

8. A method for packaging an integrated circuit comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing an integrated circuit, said integrated circuit comprising an integrated circuit first surface and an integrated circuit second surface, opposite said integrated circuit first surface;

forming a hole through said substrate, said hole extending from said substrate first surface to said substrate second surface, said hole comprising hole sides, said hole being large enough to position said second surface of said integrated circuit in said hole;

applying tape to said second surface of said substrate, said tape covering said hole and thereby forming a hole bottom surface comprising a portion of said tape;

positioning said integrated circuit in said hole with said second surface of said integrated circuit on said hole bottom surface such that a distance between said second surface of said integrated circuit and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

electrically coupling said integrated circuit to said substrate with bond wires;

applying a layer of encapsulant to;

said first surface of said integrated circuit;

said first surface of said substrate; and

said bond wires;

filling gaps between said integrated circuit and said hole sides with said encapsulant;

allowing said encapsulant to harden; and

removing said tape from said second surface of said substrate.

9. The method of claim 8, wherein;

said integrated circuit is a sensor die.

10. A method for packaging a sensor die comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing a sensor die, said sensor die comprising a sensor die first surface and a sensor die second surface, opposite said sensor die first surface, said sensor die further comprising an active region on said first surface of said sensor die;

providing an optical element, said optical element comprising an optical element first surface, an optical element second surface, opposite said optical element first surface, and optical element sides;

forming a hole through said substrate, said hole extending from said substrate first surface to said substrate second surface, said hole comprising hole sides, said hole being large enough to position said second surface of said sensor die in said hole;

applying tape to said second surface of said substrate, said tape covering said hole and thereby forming a hole bottom surface comprising a portion of said tape;

positioning said sensor die in said hole with said second surface of said sensor die on said hole bottom surface such that a distance between said second surface of said sensor die and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

positioning said optical element on said sensor die such that said second surface of said optical element is positioned over said active region of said first surface of said sensor die;

electrically coupling said sensor die to said substrate with electrical connections;

applying a layer of encapsulant to;

a portion of said first surface of said sensor die not covered by said optical element;

said first surface of said substrate;

said electrical connections; and

said optical element sides;

filling gaps between said integrated circuit and said hole sides with said encapsulant;

allowing said encapsulant to harden; and

removing said tape from said second surface of said substrate, wherein;

said optical element is held in position over said active region of said sensor die first surface, at least in part, by said encapsulant applied to said optical element sides.

11. The method of claim 10, wherein;

said electrical connections comprise bond wires.

12. The method of claim 10, wherein;

A distance from said first surface of said optical element to said second surface of said substrate is in the range of 0.3 to 0.5 millimeters.

13. A method for packaging a sensor die comprising:

providing a substrate, said substrate comprising a substrate first surface and a substrate second surface, opposite said substrate first surface;

providing a sensor die, said sensor die comprising a sensor die first surface and a sensor die second surface, opposite said sensor die first surface, said sensor die further comprising an active region on said first surface of said sensor die;

providing an optical element, said optical element comprising an optical element first surface, an optical element second surface, opposite said optical element first surface, and optical element sides;

forming a hole through said substrate, said hole extending from said substrate first surface to said substrate second surface, said hole comprising hole sides, said hole being large enough to position said second surface of said sensor die in said hole;

applying tape to said second surface of said substrate, said tape covering said hole and thereby forming a hole bottom surface comprising a portion of said tape;

positioning said sensor die in said hole with said second surface of said sensor die on said hole bottom surface such that a distance between said second surface of said sensor die and said second surface of said substrate is less than a distance between said first surface of said substrate and said second surface of said substrate;

positioning said optical element on said sensor die such that said second surface of said optical element is positioned over said active region of said first surface of said sensor die;

electrically coupling said sensor die to said substrate with bond wires;

applying a layer of encapsulant to;

a portion of said first surface of said sensor die not covered by said optical element;

said first surface of said substrate;

said bond wires; and

said optical element sides;

filling gaps between said integrated circuit and said hole sides with said encapsulant;

allowing said encapsulant to harden; and

removing said tape from said second surface of said substrate, wherein;

said optical element is held in position over said active region of said sensor die first surface, at least in part, by said encapsulant applied to said optical element sides, further wherein;

a distance from said first surface of said optical element to said second surface of said substrate is in the range of 0.3 to 0.5 millimeters.

14. A method for packaging electronic devices comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of electronic devices, each electronic device of said plurality of electronic devices comprising an electronic device first surface and an electronic device second surface, opposite said electronic device first surface;

forming a plurality of holes in said multi-package substrate first surface, each of said holes comprising hole sides and a hole bottom surface, each of said hole bottom surfaces being large enough to position one of said second surfaces of said electronic devices on said hole bottom surface;

positioning each of said electronic devices in a corresponding one of said holes with said second surface of said electronic device on said corresponding hole bottom surface such that a distance between said second surfaces of said electronic devices and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

electrically coupling each of said electronic devices to said multi-package substrate with electrical connections;

applying a layer of encapsulant to;

each of said first surfaces of said electronic devices;

said first surface of said multi-package substrate; and

said electrical connections;

filling gaps between each of said electronic devices and said hole sides of said corresponding holes with said encapsulant; and

singulating packaged electronic devices from said multi-package substrate.

15. The method of claim 14, wherein;

said electrical connections comprise bond wires.

16. The method of claim 14, wherein;

said electronic devices are integrated circuits.

17. A method for packaging integrated circuits comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of integrated circuits, each integrated circuit of said plurality of integrated circuits comprising an integrated circuit first surface and an integrated circuit second surface, opposite said integrated circuit first surface;

forming a plurality of holes in said multi-package substrate first surface, each of said holes comprising hole sides and a hole bottom surface, each of said hole bottom surfaces being large enough to position one of said second surfaces of said integrated circuits on said hole bottom surface;

positioning each of said integrated circuits in a corresponding one of said holes with said second surface of said integrated circuit on said corresponding hole bottom surface such that a distance between said second surfaces of said integrated circuits and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

electrically coupling each of said integrated circuits to said multi-package substrate with bond wires;

applying a layer of encapsulant to;

each of said first surfaces of said integrated circuits;

said first surface of said multi-package substrate; and

said bond wires;

filling gaps between each of said integrated circuits and said hole sides of said corresponding holes with said encapsulant; and

singulating packaged integrated circuits from said multi-package substrate.

18. A method for packaging electronic devices comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of electronic devices, each electronic device of said plurality of electronic devices comprising an electronic device first surface and an electronic device second surface, opposite said electronic device first surface;

forming a plurality of holes through said multi-package substrate, said holes extending from said multi-package substrate first surface to said multi-package substrate second surface, each hole of said plurality of holes comprising hole sides, each of said holes being large enough to position one of said second surfaces of said electronic devices in said hole;

applying tape to said second surface of said multi-package substrate, said tape covering each hole of said plurality of holes and thereby forming a hole bottom surface comprising a portion of said tape in each hole;

positioning each of said electronic devices in a corresponding one of said plurality of holes with said second surface of said electronic device on said corresponding hole bottom surface such that a distance between said second surfaces of said electronic devices and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

electrically coupling each of said electronic devices to said multi-package substrate with electrical connections;

applying a layer of encapsulant to;

said first surface of each of said electronic devices;

said first surface of said multi-package substrate; and

said electrical connections;

filling gaps between each of said electronic devices and said hole sides of said corresponding holes with said encapsulant;

allowing said encapsulant to harden;

removing said tape from said second surface of said multi-package substrate; and

singulating packaged electronic devices from said multi-package substrate.

19. The method of claim 18, wherein;

said electrical connections comprise bond wires.

20. The method of claim 18, wherein;

said electronic devices are integrated circuits.

21. A method for packaging integrated circuits comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of integrated circuits, each integrated circuit of said plurality of integrated circuits comprising an integrated circuit first surface and an integrated circuit second surface, opposite said integrated circuit first surface;

forming a plurality of holes through said multi-package substrate, said holes extending from said multi-package substrate first surface to said multi-package substrate second surface, each hole of said plurality of holes comprising hole sides, each of said holes being large enough to position one of said second surfaces of said integrated circuits in said hole;

applying tape to said second surface of said multi-package substrate, said tape covering each hole of said plurality of holes and thereby forming a hole bottom surface comprising a portion of said tape in each hole;

positioning each of said integrated circuits in a corresponding one of said plurality of holes with said second surface of said integrated circuit on said corresponding hole bottom surface such that a distance between said second surfaces of said integrated circuits and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

electrically coupling each of said integrated circuits to said multi-package substrate with electrical connections;

applying a layer of encapsulant to;

said first surface of each of said integrated circuits;

said first surface of said multi-package substrate; and

said electrical connections;

filling gaps between each of said integrated circuits and said hole sides of said corresponding holes with said encapsulant;

allowing said encapsulant to harden;

removing said tape from said second surface of said multi-package substrate; and

singulating packaged integrated circuits from said multi-package substrate.

22. The method of claim 21, wherein;

said integrated circuits are image sensor dice.

23. A method for packaging sensor dice comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of sensor dice, each sensor die of said plurality of sensor dice comprising a sensor die first surface and a sensor die second surface, opposite said sensor die first surface, each sensor die of said plurality of sensor dice further comprising an active region on said first surface of said sensor die;

providing a plurality of optical elements, each optical element of said plurality of optical elements comprising an optical element first surface, an optical element second surface, opposite said optical element first surface, and optical element sides;

forming a plurality of holes through said multi-package substrate, each hole of said plurality of holes extending from said multi-package substrate first surface to said multi-package substrate second surface, each hole of said plurality of holes comprising hole sides, each hole of said plurality of holes being large enough to position one of said second surfaces of said sensor dice in said hole;

applying tape to said second surface of said multi-package substrate, said tape covering each hole of said plurality of holes and thereby forming a hole bottom surface comprising a portion of said tape at the bottom of each hole;

positioning each sensor die of said plurality of sensor dice in a corresponding hole of said plurality of holes with said second surface of said sensor die on said corresponding hole bottom surface such that a distance between said second surfaces of said sensor dice and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

positioning one optical element of said plurality of optical elements, one each, on a corresponding sensor die of said plurality of sensor dice such that said second surface of said optical element is positioned over said active region of said first surface of said corresponding sensor die;

electrically coupling said sensor dice to said multi-package substrate with electrical connections;

applying a layer of encapsulant to;

a portion of said first surface of each sensor die not covered by said optical element;

said first surface of said multi-package substrate;

said electrical connections; and

said optical element sides of each of said optical elements;

filling gaps between each sensor die of said plurality of sensor dice and said hole sides of said corresponding hole with said encapsulant;

allowing said encapsulant to harden;

removing said tape from said second surface of said substrate; and

singulating packaged sensor dice from said multi-package substrate, wherein;

said optical elements are held in position over said active regions of said corresponding sensor dice first surfaces, at least in part, by said encapsulant applied to said optical element sides.

24. The method of claim 23, wherein;

said electrical connections comprise bond wires.

25. The method of claim 23, wherein;

A distance from said first surface of said optical element to said second surface of said substrate is in the range of 0.3 to 0.5 millimeters.

26. A method for packaging sensor dice comprising:

providing a multi-package substrate, said multi-package substrate comprising a multi-package substrate first surface and a multi-package substrate second surface, opposite said multi-package substrate first surface;

providing a plurality of sensor dice, each sensor die of said plurality of sensor dice comprising a sensor die first surface and a sensor die second surface, opposite said sensor die first surface, each sensor die of said plurality of sensor dice further comprising an active region on said first surface of said sensor die;

providing a plurality of optical elements, each optical element of said plurality of optical elements comprising an optical element first surface, an optical element second surface, opposite said optical element first surface, and optical element sides;

forming a plurality of holes through said multi-package substrate, each hole of said plurality of holes extending from said multi-package substrate first surface to said multi-package substrate second surface, each hole of said plurality of holes comprising hole sides, each hole of said plurality of holes being large enough to position one of said second surfaces of said sensor dice in said hole;

applying tape to said second surface of said multi-package substrate, said tape covering each hole of said plurality of holes and thereby forming a hole bottom surface comprising a portion of said tape at the bottom of each hole;

positioning each sensor die of said plurality of sensor dice in a corresponding hole of said plurality of holes with said second surface of said sensor die on said corresponding hole bottom surface such that a distance between said second surfaces of said sensor dice and said second surface of said multi-package substrate is less than a distance between said first surface of said multi-package substrate and said second surface of said multi-package substrate;

positioning one optical element of said plurality of optical elements, one each, on a corresponding sensor die of said plurality of sensor dice such that said second surface of said optical element is positioned over said active region of said first surface of said corresponding sensor die;

electrically coupling said sensor dice to said multi-package substrate with bond wires;

applying a layer of encapsulant to;

a portion of said first surface of each sensor die not covered by said optical element;

said first surface of said multi-package substrate;

said bond wires; and

said optical element sides of each of said optical elements;

filling gaps between each sensor die of said plurality of sensor dice and said hole sides of said corresponding hole with said encapsulant;

allowing said encapsulant to harden;

removing said tape from said second surface of said substrate; and

singulating packaged sensor dice from said multi-package substrate, wherein;

said optical elements are held in position over said active regions of said corresponding sensor dice first surfaces, at least in part, by said encapsulant applied to said optical element sides, further wherein;

a distance from said first surfaces of said optical elements to said second surface of said multi-package substrate is in the range of 0.3 to 0.5 millimeters.