Automatic semiconductor device classification system, method for classifying semiconductor device and recording medium having program for the system

• US 6,405,148 B1
• Filed: 09/02/1999
• Issued: 06/11/2002
• Est. Priority Date: 11/04/1998
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Hayashi, Hideaki, Sawada, Yoshinobu, Sonobe, Hironori, Takeda, Toyohiko
• Primary Examiner(s): Hilten, John S.
• Assistant Examiner(s): LE, JOHN H
• Application Number:
  US09/389,764
• Time in Patent Office: 1,013 Days
• Field of Search: 702/57, 702/64, 702/117, 702/71, 714/724, 714/733, 324/751
• US Class Current: 702/117
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736
• CPC Class Codes: G01R 31/31718 Logistic aspects, e.g. binning, selection, sorting of devices under test, tester/handler interaction networks, Test management software, e.g. software for test statistics or test evaluation, yield analysis mechanical aspects G01R31/2808, G01R31/2851

Abstract

The present invention discloses an automatic semiconductor device classification system including a current measuring unit, a data memory, a processor connected to the data memory and the current measuring unit, and an output unit connected to the processor. Patterns of curves representing approximate I-V characteristics between predetermined electrodes of semiconductor devices are automatically determined and the approximate I-V characteristics are classified into predetermined categories. The data memory stores the discrete I-V relations, and further stores a first control voltage, a first threshold current value at the first control voltage, a second control voltage corresponding to the second control voltage. The processor includes an acquisition circuit, a comparison circuit and a classification circuit. In the acquisition circuit, the first decision current value at the first control voltage and the second decision current value at the second control voltage are obtained using the measured results. In the comparison circuit, the first decision current value is compared with the first threshold current value stored in the data memory and the second decision current value is compared with the second threshold current value stored in the data memory. In the classification circuit, the patterns of the curves representing the approximate I-V characteristics are determined and classification is performed.

Claims

1. An automatic semiconductor device classification system comprising:

(a) a current measuring unit having;

a voltage controller configured to apply a sequence of discrete output voltages between predetermined electrodes disposed on each of semiconductor devices, he discrete output voltages are gradually increasing discrete voltages, each oft the discrete output voltages is constant with regard to time the semiconductor devices are disposed in respective chip areas arranged on a surface of a semiconductor wafer; and

an ammeter configured to measure corresponding discrete currents flowing between he predetermined electrodes;

(b) a data memory for storing measured discrete I-V relations defined by the measured discrete current and the applied discrete output voltages, a first control voltage assigned between the predetermined electrodes, a first threshold current value assigned between the predetermined electrodes at the first control voltage, a second control voltage assigned between the predetermined electrodes which is larger than the first control voltage, and a second threshold current value assigned between the predetermined electrodes at the second control voltage, the second threshold current value is larger than the first threshold current value; and

(c) the processor connected to the data memory and the current measuring unit, the processor comprising;

an acquisition circuit for obtaining a first decision current value flowing between the predetermined electrodes at the first control voltage and a second decision current value flowing between the predetermined electrodes at the second control voltage using the discrete I-V relations;

a comparison circuit connected to the acquisition circuit for comparing the first decision current value with the first threshold current value stored in the data memory and comparing the second decision current value with the second threshold current value stored in the data memory; and

a classification circuit connected to the comparison circuit for determining an approximate I-V characteristic between the predetermined electrodes on the basis of results obtained by the comparison circuit and then performing classification according to the determination.

2. The system of claim 1, further comprising:

(d) an output unit connected to the processor for outputting classified results.

3. The system of claim 2, wherein the current measuring unit measures plural sets of the discrete I-V relations between electrodes of each of a plurality of semiconductor devices, and the output unit outputs a classification map on the surface of the semiconductor wafer of the approximate I-V characteristics.

4. The system of claim 1, wherein the data memory is installed in or connected to a host computer.

5. The system of claim 4, wherein the processor is installed in a terminal computer connected to the host computer.

6. The system of claim 4, wherein the processor is installed in a plurality of terminal computers, connected to the host computer, respectively.

7. The system of claim 1, wherein the current measuring unit further comprises a time period controller for controlling time period of the discrete output voltage.

8. The system of claim 7, wherein the current measuring unit applies two sets of the discrete output voltages with different time periods, and the classification circuit determines approximate I-V characteristics between the predetermined electrodes for each time period and classifies the determined approximate I-V characteristics into predetermined categories.

9. The system of claim 7, further comprises:

(d) an output unit for outputting classified results.

10. The system of claim 9, wherein the current measuring unit applies two sets of the discrete output voltages with different time periods, the classification circuit determines approximate I-V characteristics between the predetermined electrodes for each time period and classifies the determined approximate I-V characteristics into predetermined categories, and the output unit displays the approximate I-V characteristics for each different time period in an overlapped but distinguishable manner.

11. The system of claim 9, wherein the processor further comprises:

a difference calculation circuit for obtaining a difference of the approximate I-V characteristics between one and another time periods.

12. The system of claim 9, wherein the current measuring unit applies two sets of the discrete output voltages with different time periods, the classification circuit determines an approximate I-V characteristic between the predetermined electrodes for each time period and the output unit displays a difference of the approximate I-V characteristics between one and another time periods.

13. The system of claim 12, wherein the current measuring unit measures plural sets of the I-V relations for each of a plurality of semiconductor devices, and the output unit outputs a distribution of the differences on the surface of the semiconductor wafer.

14. The system of claim 1, wherein the processor further comprises:

a learning circuit connected to the data memory and the classification circuit, for obtaining a new category by using the approximate I-V characteristics as model data.

15. The system of claim 14, wherein the learning circuit has a neural network mechanism in which the new category is obtained using a learning function by a neuro-model.

16. The system of claim 1, wherein each of the semiconductor devices is a transistor whose gate electrode is set open, and said ammeter measures the current flowing between source and drain electrodes of the transistor.

17. The system of claim 1, wherein said classification circuit classifies the I-V relations into one of “

channel”

, “

soft break down”

, “

short circuit failure” and

“

hard break down”

, respectively.

18. A method for automatically classifying a plurality of semiconductor devices, the semiconductor devices are disposed in respective chip areas arranged on a surface of a semiconductor wafer, comprising the steps of:

(a) setting a first control voltage assigned between predetermined electrodes disposed on each of semiconductor devices, a first threshold current value assigned between the predetermined electrodes at the first control voltage, a second control voltage assigned between the predetermined electrodes which is larger than the first control voltage, and a second threshold current value assigned between the predetermined electrodes at the second control voltage, the second threshold current value is larger than the first threshold current value;

(b) applying a set of discrete measuring voltages between the predetermined electrodes, the discrete measuring voltages are gradually increasing discrete voltages, each of the discrete measuring voltages is constant with regard to time, and measuring discrete current values flowing between the predetermined electrodes during application of each of the discrete measuring voltages;

(c) obtaining a first decision current value flowing between the predetermined electrodes at the first control voltage and a second decision current value flowing between the predetermined electrodes at the second control voltage, on the basis of the discrete current values;

(d) comparing the first decision current value with the first threshold current value and comparing the second decision current value with the second threshold current value; and

(e) determining an approximate I-V characteristic between the predetermined electrodes on the basis of the results obtained in step (d) and classifying the approximate I-V characteristic into predetermined category.

19. The method of claim 18, further comprises:

a step of outputting the classified results.

20. The method of claim 18, wherein the measuring step (b) includes the steps of:

applying measuring voltages with different time periods but at the same measuring voltage value; and

measuring the current value for each different time period,

and the outputting step includes a step of outputting the approximate I-V characteristic for each time period in an overlapped but distinguishable manner.

21. The method of claim 18, further comprises a step of inputting curves of the determined approximate I-V characteristics as model data and obtaining, by using a learning function, a new category of pattern used for the classifying step.

22. The method of claim 18, wherein each of the semiconductor devices is a transistor whose gate electrode is set open, and the first and second decision current values flowing between source and drain electrodes of the transistor are obtained.

23. The method of claim 18, wherein said I-V relations are classified into one of “

channel”

, “

soft break down”

, “

short circuit failure” and

“

hard break down”

, respectively.

24. A memory medium having a computer readable program for causing a semiconductor device classification system to function, the program comprising the steps of:

(a) setting a first control voltage assigned between predetermined electrodes disposed on each of the semiconductor devices, a first threshold current value assigned between the predetermined electrodes at the first control voltage, a second control voltage assigned between the predetermined electrodes which is larger than the first the first control voltage, and a second threshold current value assigned between the predetermined electrodes at the second control voltage, the second threshold current value larger than the first threshold current value, the semiconductor devices are disposed in respective chip areas arranged on a surface of a semiconductor wafer;

(b) applying a set of discrete measuring voltages between the predetermined electrodes, the discrete measuring voltages are gradually increasing discrete voltages, each of the discrete measuring voltages is constant with regard to time, and measuring discrete current values flowing between the predetermined electrodes during application of each of the discrete measuring voltages;

(c) obtaining a first decision current value flowing between the predetermined electrodes at the first control voltage and a second decision current value flowing between the predetermined electrodes a the second control voltage, on the basis of the discrete current values;

(d) comparing the first decision current value with the first threshold current value and comparing the second decision current value with the second threshold current value; and

(e) determining an approximate I-V characteristic between the predetermined electrodes of the semiconductor on the basis of the results obtained in step (d) and classifying the approximate I-V characteristic into predetermined category.

25. The memory medium of claim 24, wherein each of the semiconductor devices is a transistor whose gate electrode is set open, and the first and second decision current values flowing between source and drain electrodes of the transistor are obtained.

26. The memory medium of claim 24, wherein said I-V relations are classified into one of “

channel”

, “

soft break down”

, “

short circuit failure” and

“

hard break down”

, respectively.