Audio compression circuit and method

• US 6,405,164 B1
• Filed: 12/30/1999
• Issued: 06/11/2002
• Est. Priority Date: 12/30/1999
• Status: Expired due to Fees

• Current Assignee: The Engineering Consortium, Incorporated
• Original Assignee: The Engineering Consortium, Incorporated
• Inventors: Pinai, Hoang Minh
• Primary Examiner(s): {haeck over (S)}mits, Tãlivaldis Ivars
• Assistant Examiner(s): ABEBE, DANIEL DEMELASH
• Application Number:
  US09/475,801
• Time in Patent Office: 894 Days
• Field of Search: 704/500, 704/225, 381/23.1, 381/26, 381/28, 381/55, 381/106, 330/250, 330/254, 330/278, 330/267
• US Class Current: 704/225
• CPC Class Codes: H03G 1/0088 using discontinuously variable devices, e.g. switch-operated
• CPC Class Codes: H03G 7/002 in untuned or low-frequency amplifiers, e.g. audio amplifiers H03G7/007, H03G7/001, H03G7/008, H03G7/02, H03G7/06 take precedence
• CPC Class Codes: H04R 25/356 Amplitude, e.g. amplitude shift or compression

Abstract

An audio compressor utilizes a switched charging state rectifier which produces an output proportional to the magnitude of an input signal but with controlled attack/release times. The rectified voltage is input to a logical selector, which provides logical control signals which are a function of the rectified voltage. In a preferred embodiment, the control signals of the logical selector are used to select the switch positions of a switched resistor ladder. The switched resistor ladder is used to provide a resistance path in an op-amp feedback amplifier, thereby enabling the gain of the op-amp amplifier to be adjusted in steps by the selector as the rectified signal level varies.

Claims

1. A compressor circuit, comprising:

an input node for receiving an input signal;

an output node for outputting an output signal;

a rectifier coupled to said input node and producing a rectified voltage proportional to the magnitude of said input signal; and

an impedance controller configured to produce an impedance that is a stepwise function of said rectified voltage;

an amplifier for amplifying said input signal, said amplifier having a gain at said output node that is a function of said impedance

and where said stepwise function is selected to have sufficient number of steps so that the output of the amplifier is a piecewise approximation of a continuous compression function.

2. The compressor circuit of claim 1, wherein said rectifier is configured so that said rectified voltage has a preselected transient response to changes in the magnitude of said input signal.

3. The compressor circuit of claim 1, wherein said impedance controller comprises:

a selector to convert said rectified voltage into a plurality of switch control signals; and

a switched resistor ladder to convert said switch control signals into a resistance.

4. The compressor circuit of claim 3, wherein said selector comprises a plurality of comparators comparing the rectified voltage to a plurality of reference voltages.

5. The compressor circuit of claim 3, wherein said selector comprises a plurality of comparators configured to compare said rectified voltage to a plurality of reference voltages of a resistor chain forming a voltage divider.

6. The compressor circuit of claim 1, wherein said impedance controller comprises:

a selector to convert said rectified voltage into a plurality of switch control signals;

a current matrix configured to convert said control signals into a control current;

a current-controlled oscillator producing a variable frequency output in response to the control current; and

a switched capacitor element wherein the switching rate of said switched capacitor is determined by said variable frequency output;

whereby the effective resistance of said switched capacitor element is a stepwise function of said rectified voltage.

7. The compressor circuit of claim 1, wherein said rectifier is a switched charging state rectifier, said switched charging rectifier including:

a capacitor;

a charging switch coupling said capacitor to a charging node;

a discharge switch coupling said capacitor to a discharge node;

a switch controller configured to operate said switches so that said capacitor is charged when the voltage on said capacitor is less than the magnitude of an input voltage and discharged when the voltage on said capacitor is greater than the magnitude of the input voltage; and

a current limiting element coupled to the discharging current path to limit the rate at which current may be discharged.

8. The compressor circuit of claim 3, wherein said rectifier is a switched charging state rectifier, said switched charging rectifier including:

a capacitor;

a charging switch coupling said capacitor to a charging node;

a discharge switch coupling said capacitor to a discharge node;

a switch controller configured to operate said switches so that said capacitor is charged when the voltage on said capacitor is less than the magnitude of an input voltage and discharged when the voltage on said capacitor is greater than the magnitude of the input voltage; and

a current limiting element coupled to the discharging current path to limit the rate at which current may be discharged.

9. The compressor circuit of claim 6, wherein said rectifier is a switched charging state rectifier, said switched charging rectifier including:

a capacitor;

a charging switch coupling said capacitor to a charging node;

a discharge switch coupling said capacitor to a discharge node;

a switch controller configured to operate said switches so that said capacitor is charged when the voltage on said capacitor is less than the magnitude of an input voltage and discharged when the voltage on said capacitor is greater than the magnitude of the input voltage; and

a current limiting element coupled to the discharging current path to limit the rate at which current may be discharged.

10. A compressor circuit, comprising:

an amplifier;

a switched charging state rectifier producing an rectified voltage that is a function of the magnitude of an input signal with a controlled transient response, said switched charging rectifier including;

a capacitor;

a charging switch coupling said capacitor to a charging node;

a discharge switch coupling said capacitor to a discharge node;

a switch controller configured to operate said switches so that said capacitor is charged when the voltage on said capacitor is less than the magnitude of an input voltage and discharged when the voltage on said capacitor is greater than the magnitude of the input voltage; and

a current limiting element coupled to the discharging current path to limit the rate at which current may be discharged; and

an impedance controller receiving as an input the rectified voltage of said switched charging state rectifier and providing a controlled impedance coupled to said amplifier to regulate the amplifier gain according to a stepwise compression function;

wherein the capacitance of said capacitance and the electrical characteristics of said current limiting element are selected so that said compressor circuit has a preselected release time.

11. The compressor circuit of claim 10, wherein said impedance control circuit comprises:

a selector receiving as an input the rectified voltage and producing logical control signals coupled to a plurality of switches of a resistance ladder to adjust the resistance of the resistance ladder as a function of the rectified voltage of said switched charging state rectifier.

12. The compressor circuit of claim 11, wherein said selector comprises a plurality of comparators configured to compare the rectified voltage of said switched charging state rectifier to a plurality of reference voltages of a resistor chain forming a voltage divider.

13. The compressor circuit of claim 10, wherein said impedance control circuit comprises a selector receiving as an input the rectified voltage and producing logical control signals coupled to a plurality of current sources connected as a current matrix with a common output control current, said logical control signals adjusting the output control current of said current matrix as a function of the rectified voltage of said switched charging state rectifier.

14. The compressor circuit of claim 12, wherein said control current is input to a current-to-frequency oscillator to produce switch control signals that are coupled to a switched-capacitor element.

15. The compressor circuit of claim 14, wherein said selector comprises a plurality of comparators comparing the output voltage of said switched charging state rectifier to a plurality of reference voltages.

16. The compressor circuit of claim 10, wherein said impedance control circuit comprises:

a bipolar transistor receiving as a base-emitter control voltage the rectified voltage and having as an output an emitter-collector control current, a current a current-to-frequency oscillator producing switch control signals as a function of the control current; and

a switched-capacitor element receiving said switch control signals.

17. A compressor circuit, comprising:

an amplifier;

a switched charging state rectifier producing an rectified voltage that is a function of the magnitude of an input signal with a controlled transient response, said switched charging rectifier comprising;

a capacitor;

a charging switch coupling said capacitor to a charging node;

a discharge switch coupling said capacitor to a current sink;

a switch controller adjusting the operation of said switches so that said capacitor is charged when the voltage on said capacitor is less than the magnitude of an input voltage and discharged when the voltage on said capacitor is greater than the magnitude of the input voltage; and

a selector circuit for converting the output of said switched charging state rectifier into switch control signals; and

a switched resistor ladder electrically coupled to said amplifier to regulate the amplifier gain, said switching resistor ladder having a plurality of switches for controlling the resistance of said resistor ladder;

wherein said selector circuit provides control signals which select the resistance of said resistor ladder as a function of the input signal level.

18. The compressor circuit of claim 17, wherein said selector comprises a plurality of comparators each receiving as an input a voltage corresponding to the output of said switched charging state rectifier and each having a reference voltage determined by a resistive voltage divider.

19. The compressor circuit of claim 18, wherein the resistors of said resistive voltage divider are selected to adjust the trigger voltage of each said comparator in accord with a compression function.

20. The compressor circuit of claim 17, wherein current sink comprises a current mirror.

21. The compressor circuit of claim 17, wherein said charging current node couples said capacitor to an input signal node so that said capacitor is coupled to said signal by said charging switch.

22. The compressor circuit of claim 17, wherein said charging current node couples said capacitor to a charging current source.

23. The compressor circuit of claim 22, wherein said charging current source comprises a current mirror.

24. A method of compressing an audio input signal, comprising the steps of:

generating a rectified voltage from said input signal having a preselected attack and release function; and

compressing the input signal as a pre-selected stepwise function of said rectified voltage;

wherein said stepwise function is selected so that the compression is a piecewise approximation of a continuous compression function.

25. The method of claim 24, wherein a digital signal processor is used to generate said rectified voltage.

26. A method of compressing an audio input signal, comprising the steps of:

rectifying said input signal to produce a rectified voltage;

generating an impedance which is a stepwise function of the magnitude of said rectified voltage; and

compressing the input signal as a pre-selected function of said impedance;

wherein said stepwise function is selected so that the compression is a piecewise approximation of a continuous compression function.

27. The method of claim 26, further including the step of:

selecting said stepwise function so that the compression function changes as a function of the magnitude of the input signal in steps of about one dB or less.

28. The method of claim 26, wherein the input signal is compressed as a linear function of said impedance.

29. The method of claim 26, wherein said step of rectification includes converting the rectified voltage into an output having a preselected attack response.

30. The method of claim 26, wherein said step of rectification includes converting the rectified voltage into an output having a preselected release response.