SOI wafer device and a method of fabricating the same

• US 6,407,427 B1
• Filed: 11/06/2000
• Issued: 06/18/2002
• Est. Priority Date: 11/05/1999
• Status: Expired due to Term

• Current Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Original Assignee: Hyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
• Inventors: Oh, Jeong Hee
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Schillinger, Laura M
• Application Number:
  US09/705,705
• Time in Patent Office: 589 Days
• Field of Search: 257/347, 257/276, 257/299, 257/350, 257/351, 257/371, 257/372, 257/375, 438/151, 438/225, 438/233, 438/297, 438/586, 359/41, 359/59, 359/67
• US Class Current: 257/347
• CPC Class Codes: H01L 29/78615 with a body contact
• CPC Class Codes: H01L 29/78639 with a drain or source connected to a bulk conducting substrate

Abstract

The present invention discloses a SOI device capable of removing a floating body effect and improving a static electricity emission characteristic and a method of fabricating the same. The SOI device according to the present invention, comprising: a base substrate; a buried oxide layer formed to expose a predetermined region of the base substrate on the base substrate; a body contact layer formed to the same thickness as the buried oxide layer on the exposed base substrate region; a body layer of a transistor formed on the buried oxide layer and the body contact layer; a gate having a gate oxide layer formed on the body layer; and a drain region and a source region formed in a depth contacting with the buried oxide in the body layer region at both sides of the gate, the source being in contact with the body contact layer.

Claims

1. A SOI device comprising:

a base substrate;

a buried oxide layer formed to expose a predetermined region of the base substrate on the base substrate;

a body contact layer formed to the same thickness as the buried oxide layer on the exposed base substrate region;

a body layer of a transistor formed on the buried oxide layer and the body contact layer;

a gate having a gate oxide layer formed on the body layer; and

a drain region and a source region respectively formed in a depth contacting with the buried oxide in the body layer region at both sides of the gate, the source being in contact with the body contact layer.

2. The SOI device according to claim 1, wherein the body contact layer is a selective Si epitaxial growth layer.

3. The SOI device according to claim 1, wherein the body layer is a Si epitaxial growth layer.

4. The SOI device according to claim 1, wherein the body contact layer and the body layer are a single Si epitaxial growth layer.

5. The SOI device according to claim 1, further comprising a gate electrode, a source electrode, and a drain electrode respectively contacting with the gate, the source region, and the drain region.

6. The SOI device according to claim 5, further comprising a substrate contact electrode in contact with the base substrate through the buried oxide layer.

7. The SOI device according to claim 6, further comprising an impurity region formed at a border between the substrate contact electrode and the base substrate.