Metal oxide semiconductor transistor circuit and semiconductor integrated circuit using the same

• US 6,469,568 B2
• Filed: 12/22/2000
• Issued: 10/22/2002
• Est. Priority Date: 12/24/1999
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Sato, Yuichi, Toyoyama, Shinji
• Primary Examiner(s): Cunningham, Terry D.
• Application Number:
  US09/742,369
• Publication Number:
  US 20010006352A1
• Time in Patent Office: 669 Days
• Field of Search: 327/534, 327/537, 327/545, 327/546
• US Class Current: 327/534
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H03K 19/0013 in field effect transistor circuits
• CPC Class Codes: H03K 19/0016 by using a control or a clock signal, e.g. in order to apply power supply
• CPC Class Codes: H03K 2217/0018 Special modifications or use of the back gate voltage of a FET

Abstract

A select circuit switches a connection from a gate terminal of an NMOS transistor or a substrate voltage terminal to a semiconductor substrate or well by a Select signal. At this time, a voltage of the substrate voltage terminal is set to be lower than a gate voltage in an OFF state. Consequently, when the semiconductor substrate or well is connected to the gate terminal in an active state, the off-current can be reduced to 10⁻¹⁰ A/μm. When the substrate voltage terminal is connected to the semiconductor substrate or well in a standby state, the off-current can be further reduced to 10⁻¹² A/μm. Thus, leakage currents in the standby state and leakage currents flowing from the power supply voltage terminal to the ground voltage terminal in an active state can be suppressed.

Claims

1. A MOS transistor circuit comprising:

a substrate voltage terminal;

an input voltage terminal;

a MOS transistor having a gate, a drain, a source and a body terminal, wherein said body terminal comprises the semiconductor well and substrate, said gate connected to said input voltage terminal;

a switch for switching a connection of the body terminal to the gate terminal of the MOS transistor or a substrate voltage terminal, said switch controlled by an input select signal, wherein said switch further comprises;

an n-type transistor, wherein the body terminal of the n-type transistor is connected to ground and the source is connected to said input voltage terminal; and

a p-type transistor, wherein the body terminal and source of the p-type transistor are connected to said substrate voltage terminal, the gate terminals of the n-type and p-type transistors mutually connected to said input select signal, and wherein the drain terminals of said p-type and n-type transistors are mutually connected to said body terminal of said MOS transistor.