Potential detector and semiconductor integrated circuit

• US 6,486,729 B2
• Filed: 05/24/2001
• Issued: 11/26/2002
• Est. Priority Date: 05/24/2000
• Status: Expired due to Term

• Current Assignee: Toshiba Memory Corporation (Kioxia Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Imamiya, Kenichi
• Primary Examiner(s): Cunningham, Terry D.
• Application Number:
  US09/863,408
• Publication Number:
  US 20010045569A1
• Time in Patent Office: 551 Days
• Field of Search: 327/539, 327/536, 327/537
• US Class Current: 327/536
• CPC Class Codes: G01R 19/16552 in I.C. power supplies
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/30 Power supply circuits
• CPC Class Codes: G11C 5/143 Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels G11C5/148 takes precedence; Switching between alternative supplies G11C5/141 takes precedence
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0811 MIS diodes
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type

Abstract

An integrated semiconductor circuit has a potential detector for detecting a potential boosted by a high voltage generator. One terminal of a first capacitor is connected to a potential detection terminal via a first switching device, the other terminal thereof being connected to a reference potential terminal. A terminal of a second capacitor is connected, via a second switching device, to a first node at which the first switching device and the first capacitor are connected, the other terminal thereof being connected to the reference potential terminal. A third switch is connected between a second node at which the second switching device and the second capacitor are connected and the reference potential terminal. A clock generator generates clock signals to simultaneously and periodically turn on the first and the third switching devices whereas turn on the second switch periodically in an opposite timing for the first and the third switching devices. A comparator compares a potential at the second node with a reference potential and outputs a detection signal when a potential at the potential detection terminal reaches a predetermined potential.

Claims

1. A semiconductor integrated circuit having a high voltage generator for generating a boosted internal power supply potential, the high voltage generator comprising:

a charge pump having a plurality of first capacitors, adjacent two first capacitors being driven by clocks in opposite timing and a transfer device for transferring charges stored in each first capacitor to the succeeding first capacitor; and

a potential converter for supplying a boosted clock to each first capacitor,

wherein the potential converter includes;

a second capacitor, a first terminal thereof being connected to a high-level side power terminal via a first switching device, a second terminal thereof being connected to a low-level side power terminal via a second switching device that is turned on simultaneously with the first switching device;

a third switching device that is turned on in opposite timing for the first and the second switching devices to supply a driving potential to the second terminal of the second capacitor;

a fourth switching device that is turned on simultaneously with the third switching device to connect the first terminal of the second capacitor to an output terminal; and

a fifth switching device that is turned on simultaneously with the first switching device to reset a potential at the output terminal,

wherein the second capacitor is charged while the first and the second switching devices are on and the charged second capacitor is coupled to the first capacitor in series while the third and the fourth switching devices are on.

2. The semiconductor integrated circuit according to claim 1, wherein the potential converter includes a plurality of circuits each having the second capacitor and the first, the second, the third, and the fourth switching devices, the circuits being connected in series such that the fourth switching device of each circuit is used as the third switching device of the succeeding circuit, the fifth switching device being provided at an output terminal of the last circuit among the series-connected circuits.

3. The semiconductor integrated circuit according to claim 1, wherein a dielectric film of the second capacitor is thinner than that of the first capacitor.