Integrated circuit having buffering circuitry with slew rate control

DC
  • US 6,492,686 B1
  • Filed: 01/07/2000
  • Issued: 12/10/2002
  • Est. Priority Date: 10/02/1997
  • Status: Expired due to Term
First Claim
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1. Circuitry formed on an integrated circuit, the circuitry comprising:

  • a first terminal;

    a second terminal;

    a first transistor having a first body, a first control electrode, a first source region, and a first drain region, wherein;

    the first body, the first source region, and the first drain region are shorted together and are coupled to the first terminal; and

    a second transistor having a second body, a second control electrode, a second source region, and a second drain region, wherein;

    the second body, the second source region, and the second drain region are shorted together and are coupled to the second terminal, the second control electrode is coupled to the first control electrode, and the second transistor is of a same conductivity type as the first transitor.

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