Highly conductive composite polysilicon gate for CMOS integrated circuits

• US 6,492,694 B2
• Filed: 02/27/1998
• Issued: 12/10/2002
• Est. Priority Date: 02/27/1998
• Status: Expired due to Term

• Current Assignee: Round Rock Research LLC
• Original Assignee: Micron Technology, Inc.
• Inventors: Forbes, Leonard, Noble, Wendell P.
• Primary Examiner(s): KANG, DONGHEE
• Application Number:
  US09/031,637
• Publication Number:
  US 20020014660A1
• Time in Patent Office: 1,747 Days
• Field of Search: 257/412, 257/413, 257/408, 257/751, 257/761, 257/765, 257/762, 257/411, 257/410
• US Class Current: 257/410
• CPC Class Codes: H01L 21/28044 the conductor comprising at least another non-silicon conductive layer
• CPC Class Codes: H01L 29/4941 with a barrier layer between the silicon and the metal or metal silicide upper layer, e.g. Silicide/TiN/Polysilicon
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618
• CPC Class Codes: H10B 12/05 Making the transistor

Abstract

Many integrated circuits include a type of transistor known as a metal-oxide-semiconductor, field-effect transistor, or “mosfet,” which has an insulated gate member that controls its operation. Early mosfets had aluminum gates. But because the aluminum made the mosfets unreliable and difficult to manufacture, aluminum was abandoned in favor of polysilicon. Unfortunately, polysilicon has ten-times more electrical resistance than aluminum, which not only wastes power but also slows operation of the integrated circuits. Several efforts have been made to use materials less-resistive than polysilicon, but these have failed to yield a practical solution, since some of the materials have high electrical resistance and prevent low-voltage operation. Accordingly, one embodiment of the invention provides a gate structure that includes a doped polysilicon layer to facilitate low-voltage operation, a diffusion barrier to improve reliability, and a low-resistance aluminum, gold, or silver member to reduce gate resistance. Moreover, to overcome previous manufacturing difficulties, the inventors employ a metal-substitution fabrication technique, which entails formation of a polysilicon gate, and then substitution of metal for the polysilicon.

Claims

1. An integrated-circuit assembly for making an electrode for a transistor, the assembly comprising:

a semiconductive layer;

a metal-substitutable layer adjacent the semiconductive layer;

a first metal layer contacting the metal-substitutable layer, wherein the metal-substitutable layer and the first metal layer comprise materials susceptible to cross-diffusion at certain temperatures;

a doped polysilicon layer contacting the semiconductive layer;

a diffusion barrier layer between the doped polysilicon layer and the metal-substitutable layer; and

a second metal layer contacting the first metal layer, the second metal layer including at least one of hafnium, zirconium, and titanium.

2. The assembly of claim 1 wherein the metal-substitutable layer comprises at least one of polysilicon and germanium, and the first metal layer comprises at least one of aluminum, gold, and silver.

4. The integrated-circuit assembly of claim 1, wherein the metal-substituted layer comprises polysilicon or a silicon-germanium composition.

5. The integrated-circuit assembly of claim 1, wherein the metal-substituble layer essentially of hafnium.

6. The integrated-circuit assembly of claim 1, wherein the second metal layer consists essentially of zirconium.

7. The integrated-circuit assembly of claim 1, wherein the second metal layer consists essentially of titanium.

8. The integrated-circuit assembly of claim 1, wherein the materials are susceptible to cross-diffusion at a temperature greater than 400°

C.

9. The integrated-circuit assembly of claim 1, wherein the materials are susceptible to cross-diffusion at a temperature of about 300°

C.

10. The integrated-circuit assembly of claim 1, wherein the materials are susceptible to cross-diffusion at temperatures of about 500-600°

C.

3. The integrated-circuit assembly of claim, wherein the first metal layer consists essentially of gold, silver, or aluminum.

11. A gate structure for a field-effect transistor, comprising:

a gate insulation structure contacting a channel region of the transistor, a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer

doped to define a threshold voltage for the transistor;

a diffusion barrier layer adjacent the doped polysilicon layer and comprising at least one

of a silicon carbide, a silicon oxycarbide, and an amorphous silicon; and

a metal layer contacting the diffusion barrier layer.

12. The gate structure of claim 11 wherein the metal layer comprises at least one of aluminum, gold, and silver.

13. The gate structure of claim 11, wherein the diffusion barrier layer consists essentially of silicon carbide.

14. The gate structure of claim 11, wherein the diffusion barrier layer consists essentially of a silicon carbide.

15. The gate structure of claim 11, wherein the diffusion barrier layer consists essentially of an amorphous silicon.

16. The gate structure of claim 11 wherein the metal layer consists essentially of aluminum.

17. The gate structure of claim 11 wherein the metal layer consists essentially of gold.

18. The gate structure of claim 11 wherein the metal layer consists essentially of silver.

19. An integrated memory circuit comprising:

a memory array having a plurality of memory cells;

an address decoder coupled to the memory cells;

a plurality of bit lines coupled to the memory cells;

a voltage-sense-amplifier circuit coupled to the bit lines; and

wherein at least one of the memory cells and the voltage-sense amplifier circuit includes a field effect transistor comprising;

a gate insulation structure contacting a channel region of the transistor;

a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;

a diffusion barrier layer adjacent the doped polysilicon layer; and

a metal layer contacting the diffusion barrier layer adn comprising at least one of gold and silver.

20. The integrated memory circuit of claim 19, wherein the diffusion barrier layer consists essentially of silicon carbide.

21. The integrated memory circuit of claim 19, wherein the diffusion barrier layer consists essentially of an amorphous silicon.

22. The integrated memory circuit of claim 19, wherein the diffusion barrier layer consists essentially of an amorphous silicon.

23. The integrated memory circuit of claim 19, wherein the metal layer consists essentially of gold.

24. The integrated memory circuit of claim 19, wherein the metal layer consists essentially of silver.

25. An integrated-circuit assembly, comprising:

a plurality of field-effect transistors formed on a silicon substrate, with at least two transistors sharing a common source or drain region; and

wherein at least one transistor includes;

a gate insulation structure contacting a channel region of the one transistor;

a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the one transistor; and

a diffusion barrier layer adjacent the doped polysilicon layer; and

a metal layer contacting the diffusion barrier layer and comprising at least one of gold and silver.

26. The integrated-circuit assembly of claim 25, wherein the diffusion barrier layer consists essentially of a silicon carbide.

27. The integrated-circuit assembly of claim 25, wherein the diffusion barrier layer consists essentially of a silicon oxycarbide.

28. The integrated-circuit assembly of claim 25, wherein the diffusion barrier layer consists essentially of an amorphous silicon.

29. The integrated-circuit assembly of claim 25, wherein the metal layer consists essentially of gold.

30. The integrated-circuit assembly of claim 25, wherein the metal layer consists essentially of gold, silver, or a aluminum.

31. An integrated-circuit assembly for making an electrode for a transistor, the assembly comprising:

a semiconductive layer;

a metal-substitutable layer adjacent the semiconductive layer and comprising at least one of polysilicon and germanium oxide;

a first metal layer contacting the metal-substitutable layer and comprising materials susceptible to cross-diffusion at certain temperatures with one or more portions of the metal-substitutable layer;

a doped polysilicon layer contacting the semiconductive layer;

a diffusion barrier layer between the doped polysilicon layer and the metal-substitutable layer; and

a second metal layer contacting the first metal layer, the second metal layer including at least one of hafnium, zirconium, and titanium.

32. The integrated-circuit assembly of claim 31, wherein the first metal layer consists essentially of gold, silver, or aluminum.

33. The integrated-circuit assembly of claim 31, wherein the metal-substitutable layer comprises polysilicon or a silicon-germanium composition.

34. The integrated-circuit assembly of claim 31, wherein the materials are susceptible to cross-diffusion at a temperature greater than 400°

C.

35. The integrated-circuit assembly of claim 31, wherein the materials are susceptible to cross-diffusion at a temperature of about 300°

C.

36. The integrated-circuit assembly of claim 31, wherein the materials are susceptible to cross-diffusion at temperatures of about 500-600°

C.

37. A gate structure for a field-effect transistor, comprising:

a gate insulation structure contacting a channel region of the transistor;

a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;

a diffusion barrier layer adjacent the doped polysilicon layer and consisting essentially of at least one of a silicon carbide, a silicon oxycarbide, and an amorphous silicon; and

a gold layer contacting the diffusion barrier layer.

38. The gate structure of claim 37, wherein the gold layer consists essentially of gold.

40. The gate structure of claim 37, wherein the silver layer consists essentially of silver.

39. A gate structure for a field-effect transistor, comprising:

a gate insulation structure contacting a channel region of the transistor;

a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;

a diffusion barrier layer adjacent the doped polysilicon layer and comprising at least one of a silicon carbide, a silicon oxycarbide, and an amorphous silicon; and

a silver layer contacting the diffusion barrier layer.

41. A gate structure for a field-effect transistor, comprising:

a gate insulation structure contacting a channel region of the transistor;

a doped polysilicon layer contacting the gate insulation structure, the polysilicon layer doped to define a threshold voltage for the transistor;

a diffusion barrier layer adjacent the doped polysilicon layer and consisting essentially of a silicon carbide; and

a silver or gold layer contacting the diffusion barrier layer.