Semiconductor memory device which receives write masking information

  • US 6,496,897 B2
  • Filed: 05/14/2001
  • Issued: 12/17/2002
  • Est. Priority Date: 10/19/1995
  • Status: Expired due to Fees
First Claim
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1. A method of operation in a semiconductor memory device, wherein the memory device receives an external clock signal and includes an array of memory cells, the method comprises:

  • receiving, during a first half of a clock cycle of the external clock signal, a first data value and a first mask bit, wherein the first mask bit indicates whether to write the first data value to the array; and

    receiving, during a second half of the clock cycle of the external clock signal, a second data value and a second mask bit, wherein the second mask bit indicates whether to write the second data value to the array.

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