Adaptive amplifier circuit with enhanced dynamic range

• US 6,504,141 B1
• Filed: 09/29/2000
• Issued: 01/07/2003
• Est. Priority Date: 09/29/2000
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Rockwell Science Center LLC
• Inventors: Tennant, William E., Kozlowski, Lester J.
• Primary Examiner(s): Allen, Stephone B.
• Application Number:
  US09/675,483
• Time in Patent Office: 830 Days
• Field of Search: 250/208.1, 250/208.2, 250/214.A, 250/214.R, 250/338.1, 250/338.4, 250/339.02, 250/370.01, 250/370.14, 348/300, 348/301, 348/308
• US Class Current: 250/214.00A
• CPC Class Codes: H01L 27/1465 of the hybrid type
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response

Abstract

An adaptive amplifier circuit with minimal excess noise and a linear charge-handling capacity exceeding 10⁹ electrons to enable high-quality imaging at long wavelength infrared backgrounds and video frame rates with enhanced dynamic range is disclosed. An integration capacitor stores a charge produced from a photodetector. An adaptive skimming circuit skims off excess charge during integration of the charge on the integration capacitor. A switched-capacitor low pass filter provides enhanced dynamic range.

Claims

1. A photodetector amplifier circuit comprising:

a photodetector;

an input transistor connected to the photodetector;

an integration capacitor;

an adaptive skimming circuit connected to the integration capacitor; and

a switched-capacitor low-pass filter connected to the output of the input transistor.

2. The circuit of claim 1, further comprising a source follower transistor connected to the output of the input transistor.

3. The circuit of claim 2, further comprising an access transistor connected between the input transistor and a bus.

4. The circuit of claim 1, wherein the switched-capacitor low-pass filter comprises:

first and second transistors connected to the output of the input transistor;

a filter capacitor having one node connected to the first and second transistors; and

an output capacitor having a node connected to the second transistor and an output node.

5. The circuit of claim 4, further comprising a negative feedback amplifier connected between the photodetector and the input transistor, wherein the photodetector is a low impedance detector.

6. A focal plane array (FPA) having a plurality of pixel cells, each pixel cell comprising:

an input transistor;

a photodetector coupled to the source of the input transistor;

an adaptive skimming circuit connected to the input transistor, the adaptive skimming circuit comprising an integration capacitor for storing a charge proportional to an amount of incident light on the photodetector; and

a switched-capacitor low-pass filter connected to an output of the input transistor;

wherein the switched-capacitor low-pass filter increases a dynamic range of the circuit.

7. An amplifier circuit for coupling infrared (IR) detectors to multiplexing readouts, the circuit comprising:

detector means for converting incident light to an input electric signal;

signal input means for transferring the input electric signal from the detector means;

storage means for storing a charge from the detector; and

skimming means for skimming off a predetermined level of the input electrical signal; and

low pass filter means for increasing a dynamic range of the amplifier circuit.

8. An amplifier circuit for coupling infrared (IR) detectors to multiplexing readouts, the circuit comprising:

an input transistor;

a detector coupled to a source of the input transistor;

an adaptive skimming circuit connected to the input transistor, comprising an integration capacitor;

a first switch transistor having a source connected to the drain of the input transistor;

a second switch transistor having a source connected to a drain of the first switch transistor, and a drain connected to an output node;

a filter capacitor having a node connected to the drain of the first switch capacitor; and

an output capacitor having a node connected to the drain of the second switch capacitor.

9. The circuit of claim 8, further comprising a source follower transistor having a source connected to the drain of the input transistor.

10. The circuit of claim 9, wherein the integration capacitor is formed from a MOSFET transistor.

11. The circuit of claim 10, further comprising a negative feedback amplifier connected between the photodetector and the input transistor, wherein the photodetector is a low impedance detector.