DA conversion circuit

• US 6,509,854 B1
• Filed: 05/11/2000
• Issued: 01/21/2003
• Est. Priority Date: 03/16/1998
• Status: Expired due to Fees

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Morita, Motohiko, Maio, Kenji
• Primary Examiner(s): JeanPierre, Peguy
• Assistant Examiner(s): LAUTURE, JOSEPH J
• Application Number:
  US09/554,185
• Time in Patent Office: 985 Days
• Field of Search: 341/143, 341/136, 341/144, 341/153, 341/162, 340/347
• US Class Current: 341/144
• CPC Class Codes: H03M 1/685 the quantisation value generators of both converters being arranged in a common two-dimensional array
• CPC Class Codes: H03M 1/687 Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type
• CPC Class Codes: H03M 1/745 with weighted currents
• CPC Class Codes: H03M 1/747 with equal currents which are switched by unary decoded digital signals

Abstract

In a DA converter wherein an analog output voltage is formed in such a way that constant currents formed by a plurality of constant-current source transistors are selectively fed to a load resistor by controlling switching means to turn ON and OFF in correspondence with input signals; each of the constant-current source transistors is operated in an operating range from a saturation region to a non-saturation region as the output voltage enlarges in its absolute value, and those of the plurality of constant-current source transistors whose currents based on the operations in the non-saturation regions are selected by the switching means have their sizes enlarged so as to compensate for current decrements ascribable to such operations in the non-saturation regions.

Claims

1. A DA converter comprising:

a plurality of current source transistors; and

switching means controlled to turn ON and OFF in correspondence with input signals, for selectively feeding currents to a load resistor which forms an analog output voltage, the currents being formed by said plurality of current source transistors;

wherein each of said current source transistors is operated in an operating range from a saturation region to a non-saturation region as said analog output voltage enlarges in absolute value; and

said plurality of current source transistors includes first current source transistors and second current source transistors, the second current source transistors having a larger size than the first current source transistors, such that output currents of the second current source transistors are greater than output currents of the first current source transistors for a given drain-source voltage corresponding to the analog output voltage, so that a current for compensating for a current decrement ascribable to operation thereof in the non-saturation region may be caused to flow in each of the second current source transistors.

2. A DA converter according to claim 1, wherein

a first subset of said first current source transistors form current values corresponding to the binary input digital signals on a lower bit side; and

said second current source transistors and a second subset of said first current source transistors form current values corresponding to digital signals obtained in such a way that the binary digital input signals on a higher bit side are decoded in the decimal notation.

3. A DA converter according to claim 2, wherein a voltage which is fed to bases or gates of the first and second current source transistors is set as an output voltage of a differential amplifier circuit which receives a reference voltage corresponding to a maximum value of said analog output voltage, and a current formed by a transistor which is fabricated with a size having the current value correspondent to that of the second current source transistors and whose emitter or source and base or gate are connected in common with those of said first and second current source transistors, is caused to flow through a reference resistor endowed with a resistance being that multiple of a resistance of said load resistor which corresponds to the sum of said second current source transistors and second subset of said first current source transistors.

4. A DA converter according to claim 3, wherein switching means held in an ON state steadily is interposed between said transistor and said reference resistor in correspondence with said switching means disposed for said current source transistors.

5. A DA converter according to claim 3, wherein each of said switching means includes a pair of transistors which perform switching operations complementarily in response to the corresponding input signal, and one of which is connected to said load resistor.

6. A DA converter according to claim 5, wherein said first and second current source transistors and said switching means are respectively fabricated of MOSFET'"'"'s.

7. A DA converter according to claim 6, wherein the sizes of said plurality of current source transistors are channel widths thereof.

8. A DA converter comprising:

a plurality of current source transistors; and

switching means controlled to turn ON and OFF in correspondence with input signals, for selectively feeding currents to one end side of a load resistor which forms an analog output voltage, the currents being formed by said plurality of current source transistors;

wherein a supply voltage is fed between a first terminal to which emitters or sources of said current source transistors are connected and a second terminal to which the other end of said load resistor is connected, and is set so that a voltage obtained by subtracting a maximum value of the analog output voltage from such a supply voltage may operate said current source transistors in non-saturation regions; and

said plurality of current source transistors includes first current source transistors and second current source transistors, the second current source transistors having a larger size than the first current source transistors, such that output currents of the second current source transistors are greater than output currents of the first current source transistors for a given drain-source voltage corresponding to the analog output voltage, so as to compensate for current decrements ascribable to said operations in said non-saturation regions.

9. A DA converter according to claim 8, wherein

a first subset of said first current source transistors form current values corresponding to the binary input digital signals on a lower bit side; and

said second current source transistors and a second subset of said first current source transistors form current values corresponding to digital signals obtained in such a way that the binary digital input signals on a higher bit side are decoded in the decimal notation.

10. A DA converter according to claim 9, wherein a voltage which is fed to bases or gates of the first and second current source transistors is set as an output voltage of a differential amplifier circuit which receives a reference voltage corresponding to a maximum value of said analog output voltage, and a current formed by a transistor which is fabricated with a size having the current value correspondent to that of the second current source transistors and whose emitter or source and base or gate are connected in common with those of said first and second current source transistors, is caused to flow through a reference resistor endowed with a resistance being that multiple of a resistance of said load resistor which corresponds to the sum of said second current source transistors and second subset of said first current source transistors.

11. A DA converter according to claim 10, wherein switching means held in an ON state steadily is interposed between said transistor and said reference resistor in correspondence with said switching means disposed for said current source transistors.

12. A DA converter according to claim 10, wherein each of said switching means includes a pair of transistors which perform switching operations complementarily in response to the corresponding input signal, and one of which is connected to said load resistor.

13. A DA converter according to claim 12, wherein said first and second current source transistors and said switching means are respectively fabricated of MOSFET'"'"'s.

14. A DA converter according to claim 13, wherein the sizes of said plurality of current source transistors are channel widths thereof.

15. A DA converter comprising:

a current mirror circuit which includes a plurality of current source transistors, and switching means controlled to turn ON and OFF in correspondence with input signals, for selectively feeding currents to a load resistor which forms an analog output voltage, the currents being formed by said plurality of current source transistors; and

a reference voltage generation unit;

wherein said plurality of current source transistors of said current mirror circuit include;

first current source transistors which have current values corresponding to the binary digital signals of the input signals on a lower bit side; and

second current source transistors which are fabricated so as to have current values corresponding to digital signals obtained in such a way that the binary digital signals of said input signals on a higher bit side are decoded in the decimal notation; and

said reference voltage generation unit includes;

a transistor which is fabricated with a size having the current value correspondent to that of the second current source transistors, and whose emitter or source and base or gate are connected in common with those of the first and second current source transistors;

a reference resistor which is fed with a current formed by said transistor, and which is endowed with a resistance being a multiple of a resistance of said load resistor, the multiple corresponding to the number of said second current source transistors; and

a differential amplifier circuit which receives a voltage formed by said reference resistor, and a reference voltage corresponding to a maximum output analog voltage to-be-set, and which forms a voltage that is fed to the bases or gates of said first and second current source transistors.

16. A DA converter according to claim 15, wherein transistors held in ON states are interposed between said transistor and said reference resistor in correspondence with said switching means.

17. A DA converter according to claim 15, wherein said plurality of current source transistors are MOSFET'"'"'s, and the sizes of such plurality of current source transistors are channel widths thereof.