Efficient charge pump apparatus

• US 6,549,064 B2
• Filed: 02/12/2002
• Issued: 04/15/2003
• Est. Priority Date: 02/12/2001
• Status: Expired due to Term

• Current Assignee: Symbol Technologies, LLC (Zebra Technologies Corporation)
• Original Assignee: Matrics Incorporated (Zebra Technologies Corporation)
• Inventors: Bandy, William R., Shanks, Wayne E.
• Primary Examiner(s): Cunningham; Terry D.
• Application Number:
  US10/072,895
• Publication Number:
  US 20020149416A1
• Time in Patent Office: 427 Days
• Field of Search: 327/534,536,537 307/110 363/59
• US Class Current: 327/536
• CPC Class Codes: G06K 17/00 Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations
• CPC Class Codes: G06K 19/0713 the arrangement including a power charge pump
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/07749 the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
• CPC Class Codes: G06K 19/07767 the first and second communication means being two different antennas types, e.g. dipole and coil type, or two antennas of the same kind but operating at different frequencies
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: G06K 7/10039 interrogator driven, i.e. synchronous
• CPC Class Codes: G06K 7/10069 the collision being resolved in the frequency domain, e.g. by hopping from one frequency to the other frequency hopping or spread spectrum techniques H04B7/00
• CPC Class Codes: G06K 7/10108 interrogating only those RFIDs that fulfill a predetermined requirement, e.g. selecting all RFIDs having the same speed and moving in a cloud like fashion, e.g. on the same train; interrogating only RFIDs having a certain predetermined temperature, e.g. in the same fridge, another possibility being the active ignoring of a group of tags that fulfill a predetermined requirement, equivalent to the Boolean NOT operation
• CPC Class Codes: G06K 7/10356 using a plurality of antennas, e.g. configurations including means to resolve interference between the plurality of antennas
• CPC Class Codes: G08B 13/2485 Simultaneous detection of multiple EAS tags
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: H04L 7/0331 with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock H04L7/0337 takes precedence

Abstract

A charge pump is configured to convert a high frequency signal to a substantially direct current (DC) voltage. The charge pump includes an input capable of receiving the high frequency signal, and a plurality of stages parallel connected to the charge pump input. Charge from the high frequency signal is accumulated in the plurality of stages during a first half cycle of the high frequency signal, and is passed from a n^th stage of the plurality of stages to a (n+1)^th stage of the plurality of stages during a second half cycle of said high frequency signal, the (n+1)^th stage being closer to the charge pump output than the n^th stage. The accumulated charge increases as it moves through the plurality of stages to the charge pump output to produce a DC output voltage that is sufficiently stable to be utilized as a power supply. In embodiments of the invention, the charge pump is configured on a radio frequency (RF) identification (ID) tag, and the DC voltage provides the power supply for the RF ID tag. The DC output voltage is regulated by removing charge from the stages if a threshold voltage is exceeded, which has the effect of reducing the efficiency of the charge pump. In embodiments of the invention, the charge pump is implemented using one or more MOSFET diodes. The MOSFET diodes can be configured to have a dynamically adjustable threshold voltage, thereby facilitating operation of the charge pump in a low power environment.

Claims

1. A charge pump, comprising:

a charge pump input capable of receiving a high frequency signal;

a plurality of stages parallel connected to said charge pump input, each stage having a first capacitor connected between said charge pump input and a central node, a first diode having an anode coupled said central node and a cathode coupled to a second node, a second diode having an anode coupled to said second node in a prior stage and a cathode coupled to said central node, a second capacitor connected between said second node and ground, a third diode having an anode connected to said central node and a cathode coupled to ground; and

a charge pump output coupled to said second node in a last stage of said plurality of stages.

2. The charge pump of claim 1, wherein said first diode has a first threshold voltage V_TH1, said second diode has a second threshold voltage V_TH2, and said third diode has a third threshold voltage V_TH3, said third threshold voltage greater than at least one of said first threshold voltage and said second threshold voltage.

3. The charge pump of claim 2, wherein said third threshold voltage is greater than both said first threshold voltage and said second threshold voltage.

4. The charge pump of claim 2, wherein charge is removed from said central node by said third diode when a voltage at said central node exceeds said third threshold voltage.

5. The charge pump of claim 1, wherein said third diode conducts and removes charge from said central node when an amplitude of said high frequency signal exceeds a threshold.

6. The charge pump of claim 5, wherein said removed charge is shunted to ground.

7. The charge pump of claim 1, wherein said high frequency signal is a radio frequency signal.

8. The charge pump of claim 1, wherein said charge from said high frequency signal is accumulated in said plurality of stages during a first half cycle of said high frequency signal, and is passed from a n^th stage of said plurality of stages to a (n+1)^th stage of said plurality of stages during a second half cycle of said high frequency signal, said (n+1)^th stage being closer to said charge pump output than said n^th stage.

9. The charge pump of claim 8, wherein said accumulated charge increases as it moves through said plurality of stages to said charge pump output.

10. The charge pump of claim 8, wherein said accumulated charge is limited by said third diode if a threshold level is exceeded, said third diode configured to shunt a portion of said accumulated charge to ground when said accumulated charge exceeds said threshold level.

11. The charge pump of claim 1, wherein said first diode conducts during a first half cycle of said high frequency signal to transfer accumulated charge on said central node to said second node.

12. The charge pump of claim 11, wherein said transferred charge is stored on said second capacitor that is connected to said second node.

13. The charge pump of claim 12, wherein said second diode conducts during a second half cycle of said high frequency signal to transfer charge from said second capacitor in a n^th stage of said plurality of stages to said central node in a (n+1)^th stage of said plurality of stages.

14. The charge pump of claim 1, wherein at least one of said first diode and said second diode in at least one of said stages is configured as a metal oxide semiconductor field effect transistor (MOSFET) diode.

15. The charge pump of claim 14, wherein said MOSFET diode is implemented using a CMOS process.

16. The charge pump of claim 14, wherein a body and a gate of said MOSFET diode are connected together.

17. The charge pump of claim 16, wherein one of a source and a drain of said MOSFET diode are connected to said gate and said body.

18. The charge pump of claim 14, wherein said MOSFET diode includes a means for reducing a threshold voltage of said MOSFET diode.

19. The charge pump of claim 18, wherein said means for reducing a threshold voltage of said MOSFET diode includes a means for reducing a depletion region in said MOSFET diode.

20. The charge pump of claim 1, wherein said third diode includes a plurality of stacked MOSFET devices, connected between said central node and ground.

21. The charge pump of claim 20, said plurality of stacked MOSFET devices having a combined threshold voltage that is greater than a single MOSFET device in said plurality of stacked MOSFET devices.

22. The charge pump of claim 21, wherein said combined threshold voltage of said plurality of stacked MOSFET devices is greater than respective threshold voltages of said first diode and said second diode.

23. The charge pump of claim 1, wherein said first diode and said second diode are implemented using a respective first MOSFET diode and a second MOSFET diode.

24. The charge pump of claim 23, wherein a body and a gate of said first MOSFET diode are connected together, and wherein a body and a gate of said second MOSFET diode are connected together.

25. The charge pump of claim 23, wherein a drain of said first MOSFET diode is connected to said gate of said first MOSFET diode, and a drain of said second MOSFET diode is connected to said gate of said second MOSFET diode.

26. The charge pump of claim 23, wherein said gate of said second MOSFET diode is connected said second node in a prior adjacent stage and said gate of said first MOSFET diode is connected to said central node.

27. The charge pump of claim 23, wherein a gate of said second MOSFET diode is forward biased with an output of said first MOSFET diode in at least one of said plurality of stages.

28. The charge pump of claim 27, wherein said gate of second MOSFET diode is connected to said second node.

29. The charge pump of claim 1, wherein said second diode is forward biased with an output of said first diode.

51. The charge pump of claim 14, wherein a gate of said MOSFET diode is connected to one of a source and a drain of said MOSFET diode.

52. The charge pump of claim 51, wherein a body of said MOSFET diode is connected to ground.

53. The charge pump of claim 19, wherein said means for reducing a threshold voltage of said MOSFET diode includes a means for dynamically reducing a depletion region in said MOSFET diode.

58. The charge pump of claim 1, wherein in a first stage of said plurality of stages, an anode of said second diode is connected directly to ground.

30. A charge pump, comprising:

a charge pump input capable of receiving a high frequency signal;

a plurality of stages parallel connected to said charge pump input, each stage including,

a first capacitor coupled between said charge pump input and a central node,

a first MOSFET diode connected between said central node and a second node, a gate and a drain of said first MOSFET diode coupled to said central node, and a source of said second MOSFET diode coupled to said second node,

a second MOSFET diode connected between said second node of a prior adjacent stage and said central node, a drain of said second MOSFET diode coupled to said second node of a prior adjacent stage, and a source of said second MOSFET diode coupled to said central node,

a second capacitor coupled between said second node and ground,

a MOSFET device having a drain connected to said central node and source connected to ground; and

a charge pump output coupled to said second node in a last stage of said plurality of stages.

31. The charge pump of claim 30, wherein said first MOSFET diode has a first threshold voltage V_TH1, said second MOSFET diode has a second threshold voltage V_TH2, and said MOSFET device has a third threshold voltage V_TH3, said third threshold voltage greater than at least one of said first threshold voltage and said second threshold voltage.

32. The charge pump of claim 31, wherein said third threshold voltage is greater than both said first threshold voltage and said second threshold voltage.

33. The charge pump of claim 31, wherein charge is removed from said central node by said MOSFET device when a voltage at said central node exceeds said third threshold voltage.

34. The charge pump of claim 31, wherein said MOSFET device conducts and removes charge from said central node when an amplitude of said high frequency signal exceeds a threshold.

35. The charge pump of claim 34, wherein said removed charge is shunted to ground.

36. The charge pump of claim 30, wherein said MOSFET device is one of a plurality of stacked MOSFET devices, said stacked MOSFET devices having a combined threshold voltage that is greater than that of a single MOSFET device.

37. The charge pump of claim 30, wherein said charge from said high frequency signal is accumulated in said plurality of stages during a first half cycle of said high frequency signal, and is passed from a n^th stage of said plurality of stages to a (n+1)^th stage of said plurality of stages during a second half cycle of said high frequency signal, said (n+1)^th stage being closer to said charge pump output than said n^th stage.

38. The charge pump of claim 37, wherein said accumulated charge increases as it moves through said plurality of stages to said charge pump output.

39. The charge pump of claim 38, wherein said accumulated charge is limited by said MOSFET device if said accumulated charge exceeds a threshold level, said MOSFET device configured to shunt a portion of said accumulated charge to ground when said accumulated charge exceeds said threshold level.

40. The charge pump of claim 36, wherein said first MOSFET diode conducts during a first half cycle of said high frequency signal to transfer accumulated charge on said central node to said second node.

41. The charge pump of claim 40, wherein said transferred charge is stored on said second capacitor that is connected to said second node.

42. The charge pump of claim 41, wherein said second MOSFET diode conducts during a second half cycle of said high frequency signal to transfer charge from said second node in a n^th stage of said plurality of stages to said central node in a (n+1)^th stage of said plurality of stages.

43. The charge pump of claim 30, wherein a body of said first MOSFET diode is coupled to said gate of said MOSFET diode.

44. The charge pump of claim 30, wherein a body of said second MOSFET diode is coupled to a gate of said second MOSFET diode.

45. The charge pump of claim 30, wherein a gate of said second MOSFET diode is connected to said drain of said first MOSFET diode.

46. The charge pump of claim 30, wherein a gate of said second MOSFET diode is forward biased with an output of said first MOSFET diode.

47. The charge pump of claim 46, wherein a gate of said second MOSFET diode is coupled to said second node.

48. The charge pump of claim 30, wherein a gate of said second MOSFET diode is connected to a source of said first MOSFET diode.

49. The charge pump of claim 30, wherein said first MOSFET diode, said second MOSFET diode, and said MOSFET device are implemented using a CMOS process.

50. The charge pump of claim 30, wherein a gate of said second MOSFET diode is connected to a drain of said second MOSFET diode.

54. The charge pump of claim 30, wherein a gate of said MOSFET device in a last stage of said plurality of stages is coupled to said charge pump output.

55. The charge pump of claim 30, wherein a gate of said MOSFET device in a first stage of said plurality of stages is coupled to a corresponding gate of said MOSFET device in a second stage of said plurality of stages, both said gates of said MOSFET devices coupled said charge pump output.

56. A chare pump, comprising:

a charge pump input capable of receiving a high frequency signal;

a first stage, including

a first capacitor connected between said charge pump input and a central node of said first stage, a first diode having an anode coupled said central node and a cathode coupled to a second node, a second diode having an anode coupled to ground and a cathode coupled to said central node, a second capacitor connected between said second node and ground, a third diode having an anode connected to said central node and a cathode coupled to ground;

a second stage, including

a third capacitor connected between said charge pump input and a central node of said second stage, a fourth diode having an anode coupled said central node of said second stage and a cathode coupled to a second node of said second stage, a fifth diode having an anode coupled to said second node of said first stage and a cathode coupled to said central node of said second stage, a fourth capacitor connected between said second node of said second stage and ground, a sixth diode having an anode connected to said central node of said second stage and a cathode coupled to ground; and

a charge pump output coupled to said second node of said second stage.

57. The charge pump of claim 56, wherein said second stage is one of a plurality of stages series connected to said second stage, and parallel connected to said charge pump input.