Method for forming gate
First Claim
1. A method for forming a semiconductor gate, comprising:
- providing a substrate, wherein the substrate has a stacked structure comprising a first conductive layer and a cap layer;
forming a high density plasma (HDP) dielectric layer over the substrate, while the cap layer is exposed, wherein a top of the HDP dielectric layer is higher than a top of the first conductive layer;
removing the cap layer to form a recess between the HDP dielectric layer and on the first conductive layer;
forming an oxide spacer on sidewalls of the recess; and
forming a second conductive layer over the substrate to cover the recess so that the first conductive layer is connected to the second conductive layer.
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Abstract
The invention provides a method for forming a semiconductor gate, by forming spacers to isolate the interface between the HDP dielectric layer and the polysilicon gate being exposed, thereby preventing single bit failure resulting from defects at the interface between the HDP dielectric layer and the polysilicon gate. After a cap layer is formed on a conductive structure over the substrate, a HDP dielectric layer is formed exposing the cap layer. A top of the HDP dielectric layer is higher than a top of the first conductive layer. After removing the cap layer to form a recess between the HDP dielectric layer and on the conductive structure, spacers are formed on sidewalls of the recess. Afterwards, a conductive layer is formed and connected to the conductive structure.
21 Citations
20 Claims
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1. A method for forming a semiconductor gate, comprising:
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providing a substrate, wherein the substrate has a stacked structure comprising a first conductive layer and a cap layer;
forming a high density plasma (HDP) dielectric layer over the substrate, while the cap layer is exposed, wherein a top of the HDP dielectric layer is higher than a top of the first conductive layer;
removing the cap layer to form a recess between the HDP dielectric layer and on the first conductive layer;
forming an oxide spacer on sidewalls of the recess; and
forming a second conductive layer over the substrate to cover the recess so that the first conductive layer is connected to the second conductive layer. - View Dependent Claims (2, 3, 4, 5, 6)
forming a HDP oxide layer over the substrate to cover the cap layer; and
using HF to remove a portion of the HDP oxide layer to expose the cap layer.
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7. A method for forming a floating gate for a flash memory, comprising:
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providing a substrate, wherein the substrate has a stacked structure comprising a first conductive layer and a cap layer;
forming a high density plasma (HDP) dielectric layer over the substrate, while the cap layer is exposed, wherein a top of the HDP dielectric layer is higher than a top of the first conductive layer;
removing the cap layer to form a recess between the HDP dielectric layer and on the first conductive layer;
forming an oxide layer to cover the recess;
defining the oxide layer to expose the cap layer, leaving a portion of the oxide layer on sidewalls of the recess; and
forming a second conductive layer over the substrate to cover the recess so that the first conductive layer is connected to the second conductive layer. - View Dependent Claims (8, 9, 10, 11, 12, 13)
forming a HDP oxide layer over the substrate to cover the cap layer; and
using HF to remove a portion of the HDP oxide layer to expose the cap layer.
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14. A method for forming a floating gate for a flash memory, comprising:
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forming a conductive structure on a substrate;
forming a cap layer on the conductive structure;
forming a high density plasma (HDP) dielectric layer over the substrate, while the cap layer is exposed, wherein a top of the HDP dielectric layer is higher than a top of the conductive structure;
removing the cap layer to form a recess between the HDP dielectric layer and on the conductive structure;
forming an oxide spacer on sidewalls of the recess; and
forming a conductive layer over the substrate to cover the recess so that the conductive structure is connected to the conductive layer. - View Dependent Claims (15, 16, 17, 18, 19, 20)
forming an oxide layer over the substrate; and
performing etching back to the oxide layer.
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18. The method as claimed in claim 14, wherein the HDP dielectric layer includes a HDP oxide layer.
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19. The method as claimed in claim 14, wherein materials for forming the cap layer includes silicon nitride.
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20. The method as claimed in claim 19, wherein removing the cap layer comprises using hot phosphoric acid.
Specification