Port manager controller for connecting various function modules

• US 6,574,688 B1
• Filed: 10/12/1999
• Issued: 06/03/2003
• Est. Priority Date: 01/05/1999
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Latif, Farrukh A., Dale, Michele Z.
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): ELAMIN, ABDELMONIEM I
• Application Number:
  US09/416,625
• Time in Patent Office: 1,330 Days
• Field of Search: 710/5, 710/52, 710/113, 711/151, 358/1.13
• US Class Current: 710/52
• CPC Class Codes: G06F 13/14 Handling requests for interconnection or transfer
• CPC Class Codes: G06F 13/364 using independent requests or grants, e.g. using separated request and grant lines

Abstract

An improved method and apparatus for connecting various function modules located within a computer or communications system are proposed. In accordance with the principles of the present invention, a port manager controller (PMC) has a direct interface to each of the function modules and to a host component such as a system memory or a CPU. The PMC replaces both the local bus and the arbitrator of prior art systems. All the requests by function modules to access the host component are first processed by the PMC. The PMC schedules the incoming requests in accordance with predefined parameters, such as priority, efficiency, and/or timing. The PMC is capable of handling more than one request at a time. The PMC is also capable of dynamically adapting to load conditions and rearranging the incoming requests to efficiently utilize the available bandwidth. Thus, the PMC reduces latency and improves the performance of the computer or communications system. The PMC also eliminates the need for changes in bus architecture when new function modules are added or old function modules are removed and permits the reuse of old function modules. The PMC also reduces the need for internal buffers and thereby reduces manufacturing costs.

Claims

1. A port manager controller (PMC) for controlling access to a host component by a plurality of function modules, wherein the PMC comprises:

(a) a host component port configured to be connected to the host component; and

(b) at least two function module ports, each configured to be connected via a point-to-point connection to one of the function modules, wherein;

the PMC is configured to (1) receive a first access request from a first function module at a first function module port of the PMC, (2) schedule a first access session for data exchange between the fast function module and the host component via the host component port and the first function module port, and (3) transfer data directly between the host component port and the first function module port.

2. The invention of claim 1, wherein the PMC is configured to accept a second access request from a second function module, different from the first function module, during the first access session.

3. The invention of claim 2, wherein the PMC is configured to schedule a second access session for data exchange between the second function module and the host component in response to the second access request, without requiring the second function module to send any other access request.

4. The invention of claim 1, wherein the PMC is configured to schedule the first access session based on a priority level for the first function module relative to other function modules.

5. The invention of claim 4, wherein the PMC is configured to control at least one of the start time and duration of the first access session based on the priority level of the first function module.

6. The invention of claim 1, wherein at least two function module ports are configured to be connected to a single function module.

7. The invention of claim 1, wherein each function module port can be individually programmed to operate as either a bidirectional port or a unidirectional port.

8. The invention of claim 1, wherein the point-to-point connection is a unidirectional connection.

9. The invention of claim 1, wherein the point-to-point connection is a bidirectional connection.

10. The invention of claim 1, wherein the PMC comprises:

(a) system interface core logic (SICL) configured to be connected to the host component;

(b) direction and data format control logic (DDFCL) connected to the SICL and configured to be connected to the function modules via a plurality of DDFCL ports;

(c) access granted logic (AGL) connected to the DDFCL and configured to be connected to the function modules via a plurality of AGL ports;

(d) priority resolution logic (PRL) connected to the DDFCL and configured to be connected to the function modules via a plurality of PRL ports; and

(e) data valid logic (DVL) connected to the PRL and configured to be connected to the function modules via a plurality of DVL ports, wherein;

the PRL and the DDFCL receive one or more control signals from a function module via corresponding PRL and DDFCL ports to request access to the host component;

the PRL determines whether to grant access to the function module;

if the PRL determines that access is to be granted, the AGL sends an access granted signal to the function module via the corresponding AGL port; and

during access by the function module, data is exchanged between the function module and the host component via the SICL and the DDFCL through the corresponding DDFCL port and the DVL sends a data valid signal to the function module via the corresponding DVL port.

11. The invention of claim 10, wherein the PRL, the AGL, the DVL, and the DDFCL communicate via an internal bus.

12. The invention of claim 10, wherein the PRL comprises a register, the register storing priority information related to each of the function modules.

13. The invention of claim 12, wherein the PRL is capable of monitoring the number of the access requests from each of the function modules and updating the priority information in the register based on the monitoring information.

14. The invention of claim 12, wherein the PRL is capable of evaluating the priority information in the register before generating the control signal to the AGL.

15. The invention of claim 10, wherein the PRL is capable of handling a normal access request or a priority access request from each of the function modules.

16. The invention of claim 10, wherein each port of the DDFCL is selectably and independently configurable as a unidirectional input port, a unidirectional output port, or a bidirectional port.