Method and apparatus for updating data in nonvolatile memory

• US 6,594,723 B1
• Filed: 09/07/1999
• Issued: 07/15/2003
• Est. Priority Date: 09/07/1999
• Status: Expired due to Term

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Li, Hang, Moeller, Mark M., Chapman, Craig
• Primary Examiner(s): Yoo, Do Hyun
• Assistant Examiner(s): CHACE, CHRISTIAN
• Application Number:
  US09/391,134
• Time in Patent Office: 1,407 Days
• Field of Search: 711/102, 711/103, 711/154, 712/37, 713/1, 713/2, 713/100
• US Class Current: 711/103
• CPC Class Codes: G06F 8/65 Updates security arrangements therefor G06F21/57
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Abstract

A computer system includes a Flash or other nonvolatile memory. A program(s) to coordinate data transfers is loaded into a volatile system memory to transfer data from an external device to the Flash memory. The data transferred from the external device to the Flash memory can be transferred to a previously unused portion of the Flash memory, or alternatively can overwrite a previously used portion of the Flash memory. According to one aspect of the invention, the data is transferred from the external device to the volatile system memory and then from the volatile system memory to the Flash memory, allowing additional verification steps to help insure that the data is transferred intact. According to another aspect of the invention, data is copied from the external device to the Flash memory on a portion by portion basis, leaving a set of critical portions to be transferred last.

Claims

1. A method comprising:

identifying a plurality of portions of a set of instructions to be transferred to a nonvolatile memory;

identifying a subset of the plurality of portions that represent a critical set of instructions;

transferring all of the plurality of portions other than the subset to the nonvolatile memory; and

transferring the subset of the plurality of portions to the nonvolatile memory after all other portions have been transferred.

2. A method as recited in claim 1, wherein the nonvolatile memory comprises Flash memory.

3. A method as recited in claim 1, wherein the identifying the plurality of portions comprises identifying the plurality of portions of a set of instructions located in random access memory.

4. A method as recited in claim 1, wherein the identifying the plurality of portions comprises identifying the plurality of portions of a set of instructions located on an external storage device.

5. A method as recited in claim 1, wherein the transferring all of the plurality of portions other than the subset and the transferring the subset of the plurality of portions to the nonvolatile memory comprise, on a portion by portion basis, erasing a plurality of cells of the nonvolatile memory where a portion is to be written and writing the portion to the plurality of cells.

6. A method as recited in claim 1, further comprising disabling a power off state until all of the plurality of portions have been transferred to the nonvolatile memory.

7. At least one computer-readable memory containing a computer program that is executable by a processor to perform the method recited in claim 1.

8. An automobile computer programmed to perform the method as recited in claim 1.

9. A method in a system including volatile system memory and Flash memory, the method comprising:

executing, under control of an operating system, a Flash memory update program;

setting a first flag;

rebooting the system a first time;

limiting, after rebooting the system the first time, the operating system to accessing a first portion of the system memory;

detecting, after rebooting the system the first time, the first flag having been set;

loading a temporary operating system into the first portion of the system memory in response to the first flag having been set;

setting a second flag;

rebooting the system a second time;

detecting, after rebooting the system the second time, the second flag having been set;

executing the temporary operating system in response to the second flag having been set;

loading a new operating system image, including a new operating system, into a second portion of the system memory in response to the second flag having been set, the second portion being different than the first portion of the system memory;

verifying the new operating system image in the second portion of the system memory;

erasing the Flash memory and copying the new operating system image from the second portion of the system memory to the erased Flash memory in portions, including erasing and copying a set of most critical portions for last;

verifying the new operating system image in the Flash memory;

clearing the first and second flags; and

rebooting the system a third time.

10. A method as recited in claim 9, further comprising setting a third flag prior to the erasing and copying, the third flag indicating that the method is in the process of copying the new operating system image from the second portion of the system memory to the Flash memory.

11. A method as recited in claim 10, further comprising:

detecting, based on the third flag having been set, whether the system has been rebooted during the erasing and copying; and

restarting the erasing and copying in the event the system has been rebooted during the erasing and copying.

12. At least one computer-readable memory containing a computer program that is executable by a processor to perform the method recited in claim 9.

13. An automobile computer programmed to perform the method as recited in claim 9.

14. A computer-readable storage medium having stored thereon computer-executable instructions that cause one or more processors to:

identify a plurality of portions of a set of instructions to be transferred to a nonvolatile memory;

identify a subset of the plurality of portions that represent a critical set of instructions;

transfer all of the plurality of portions other than the subset to the nonvolatile memory; and

transfer the subset of the plurality of portions to the nonvolatile memory after all other portions have been transferred.

15. A computer-readable storage medium as recited in claim 14, wherein the nonvolatile memory comprises Flash memory.

16. A computer-readable storage medium as recited in claim 14, wherein the computer-executable instructions that cause the one or more processors to identify the plurality of portions comprise computer-executable instructions that cause the one or more processors to identify the plurality of portions of a set of instructions located in random access memory.

17. A computer-readable storage medium as recited in claim 14, wherein the computer-executable instructions that cause the one or more processors to identify the plurality of portions comprise computer-executable instructions that cause the one or more processors to identify the plurality of portions of a set of instructions located on an external storage device.

18. A computer-readable storage medium as recited in claim 14, wherein the computer-executable instructions that cause the one or more processors to transfer all of the plurality of portions other than the subset and transfer the subset of the plurality of portions to the nonvolatile memory comprise computer-executable instructions that cause the one or more processors to, on a portion by portion basis, erase a plurality of cells of the nonvolatile memory where a portion is to be written and write the portion to the plurality of cells.

19. A computer-readable storage medium as recited in claim 14, wherein the computer-executable instructions further cause the one or more processors to disable a power off state until all of the plurality of portions have been transferred to the nonvolatile memory.

20. A computer-readable storage medium as recited in claim 14, wherein the one or more processors comprise one or more processors of an automobile computer.