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Graphics processor with deferred shading

  • US 6,597,363 B1
  • Filed: 08/20/1999
  • Issued: 07/22/2003
  • Est. Priority Date: 08/20/1998
  • Status: Expired due to Term
First Claim
Patent Images

1. A graphics rendering system for forming a rendered image from graphics primitives, the rendered image stored in a frame buffer, the graphics rendering device comprising:

  • (A) a host processor;

    (B) a system memory;

    (C) a frame buffer storing pixels;

    (D) a device for receiving commands comprising;

    (1) a 2D command queue memory receiving and storing first direct memory access commands and first commands to perform two-dimensional graphics operations;

    (2) a 3D command queue memory receiving and storing second direct memory access commands and second commands to perform three-dimensional graphics operations, the second commands comprising;

    some of the graphics primitives; and

    part of a pipeline state;

    (3) a 2D response queue memory receiving and storing third commands to perform two-dimensional graphics operations;

    (4) a 3D response queue memory receiving and storing fourth commands to perform three-dimensional graphics operations, the fourth commands comprising;

    some of the graphics primitives; and

    part of the pipeline state; and

    (5) a direct memory access controller coupled to the 2D command queue memory and the 3D command queue memory, the direct memory access controller comprising;

    (a) logic receiving the stored first direct memory access commands and performing the first direct memory access commands by reading the third commands from the system memory and writing the read third commands into the 2D response queue; and

    (b) logic receiving the stored second direct memory access commands and performing the second direct memory access commands by reading the fourth commands from the system memory and writing the read fourth commands into the 3D response queue. (E) a geometry unit comprising;

    (1) logic transforming the graphics primitives;

    (2) logic clip testing the graphics primitives to determine if the graphics primitives are at least partially contained in a view volume;

    (3) logic performing face determination to discard any of the graphics primitives that are facing away from a viewing point;

    (F) a sort memory storing;

    (1) the part of the pipeline state needed for hidden surface removal; and

    (2) the part of the graphics primitives needed for hidden surface removal, comprising vertex locations;

    (G) a state memory storing;

    (1) the graphics primitives for a frame with attributes of the graphics primitives; and

    (2) the part of the graphics primitives not needed for hidden surface removal, comprising vertex colors and texture coordinates;

    (H) a sort unit comprising;

    (1) logic sorting the graphics primitives according to tile areas within the image;

    (2) logic reading the sorted graphics primitives from the sort memory according to tile;

    (I) a setup unit computing derivatives for the sorted graphics primitives;

    (J) a cull unit performing hidden surface removal to determine which portions of the graphics primitives stored in the scene memory affect the final color of the pixels in the frame buffer;

    (K) one or more computational units generating fragment color for each sample or group of samples within each of the pixels, the generation of color values for each of the pixels being done only for the portions of the graphics primitives that are determined to affect the pixels, the computational units comprising;

    (1) a device for interpolating data associated with the graphics primitives, the device comprising;

    (a) a memory storing cache fill polygon color data, the color data comprising vertex coordinates, w coordinates, and texture coordinates;

    (b) logic computing barycentric coefficients for each of the graphics primitives from the vertex coordinates and the w coordinates;

    (c) a cache memory storing a plurality of data cache entries corresponding to a plurality of the graphics primitives, the cached data comprising barycentric coefficients and texture coordinates;

    (d) a register receiving a fragment of one of the graphics primitives, the fragment comprising fragment coordinates and a sample mask, the sample mask indicating sample locations within the pixel covered by the fragment;

    (e) a lookup table determining lower bits of an interpolation location, an input of the lookup table comprising the sample mask, the interpolation location having sub-pixel accuracy;

    (f) logic selecting and reading one of the stored data cache entries corresponding to the received fragment;

    (g) logic computing interpolation coefficients from the barycentric coefficients and the interpolation location; and

    (h) logic interpolating the texture coordinates using the computed interpolation coefficients, generating texture coordinates at the interpolation location;

    (2) a device for interpolating vertex surface normals comprising;

    (a) logic decomposing each of the vertex surface normals into a vertex magnitude vector and a vertex direction vector;

    (b) logic computing an interpolated magnitude vector from a plurality of the vertex magnitude vectors and the computed interpolation coefficients;

    (c) logic computing an interpolated direction vector from a plurality of the vertex direction vectors and the computed interpolation coefficients; and

    (d) logic combining the interpolated magnitude vector and the interpolated direction vector to generate an interpolated surface normal. (L) a pixel unit comprising;

    (1) logic blending the fragment colors together to generate per-pixel color values; and

    (2) logic storing the generated per-pixel color values into the frame buffer;

    (M) a status monitoring device comprising;

    (1) logic associating object tags with the three-dimensional objects as the three-dimensional objects are processed by the graphics rendering system;

    (2) logic testing the three-dimensional objects with one or more visibility criteria as the three-dimensional objects are processed in the graphics rendering system;

    (3) a status register comprising a plurality of bits;

    (4) logic selecting one of the bits in the status register according to one of the object tags;

    (5) logic setting the value of the selected bit in the status register according to response of the corresponding one of the three-dimensional objects to the testing with the visibility criteria; and

    (6) logic reading and transmitting the status register contents to the host processor, the host processor determining which of the three-dimensional objects are at least partially visible;

    (N) a device for storing a digital image into the frame buffer comprising;

    (1) a first memory storing a window identifier map, the window identifier map comprising a window identifier for each of the pixels in the frame buffer;

    (2) a second memory storing a plurality of bounding box descriptions, each of the bounding box descriptions comprising maximum and minimum pixel coordinates of the corresponding bounding box and a bounding box window identifier;

    (3) a register storing a programmatically assigned image identifier associated with the digital image;

    (4) logic selecting an image pixel from the digital image;

    (5) pixel ownership logic operating on the selected image pixel, the pixel ownership logic comprising;

    (a) window identifier map test logic enabled by a programmatically set control bit, the window identifier map test logic comprising;

    (i) logic reading the window identifier from the first memory that corresponds to the selected image pixel;

    (ii) a comparator circuit comparing the assigned image identifier to the read window identifier; and

    (iii) logic discarding the selected image pixel if the assigned image identifier does not match the read window identifier; and

    (b) bounding box test logic enabled by a programmatically set control bit, the bounding box test logic comprising;

    (i) logic selecting a first one of the bounding box descriptions such that the selected pixel is within the maximum and minimum pixel coordinates of the selected first bounding box description;

    (ii) a comparator circuit comparing the assigned image identifier to the bounding box window identifier of the first bounding box description; and

    (iii) logic discarding the selected image pixel if the assigned image identifier does not match the bounding box window identifier of the first bounding box; and

    (c) logic writing the selected image pixel to the frame buffer if the selected image pixel was not discarded. (O) a scanout device comprising;

    (1) logic generating a histogram of the pixel values in the rendered image as the pixel values are stored into the frame buffer;

    (2) logic computing a transformation function, based on the histogram, to adjust the scale and dynamic range of the pixel values so as to match the digital-to-analog converter;

    (3) logic reading the pixel values from the frame buffer in a raster line order;

    (4) logic transforming the read pixel values according to the computed transformation function; and

    (5) logic inputting the transformed pixel values to the digital-to-analog converter. (P) a scanout device comprising;

    (1) a memory storing programmatically downloaded interpolation coefficients;

    (2) a register storing a programmatically selected one of a plurality of fixed zoom ratios;

    (3) a register storing a programmatically selected location of a zoom bounding box within the computer display;

    (4) a register storing a programmatically assigned a window identifier associated with the zoom bounding box;

    (5) logic reading a first pixel color from the frame buffer;

    (6) logic reading a plurality of second pixel colors from the frame buffer;

    (7) logic computing a zoomed pixel color from the plurality of second pixel colors and the downloaded interpolation coefficients;

    (8) logic reading a pixel window identifier from the frame buffer;

    (9) logic sending the computed zoomed pixel color to the digital-to-analog converter if the display pixel is within the zoom bounding box and the pixel window identifier equals the window identifier assigned to the zoom bounding box; and

    (10) logic sending the read first pixel color to the digital-to-analog converter if the display pixel is not within the zoom bounding box or the pixel window identifier does not equal the window identifier assigned to the zoom bounding box.

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