Signal power dynamic range compressing circuit and power amplifier using the same

• US 6,621,367 B2
• Filed: 12/28/2000
• Issued: 09/16/2003
• Est. Priority Date: 12/28/1999
• Status: Expired due to Term

• Current Assignee: NTT Docomo Incorporated (Nippon Telegraph and Telephone Corporation)
• Original Assignee: NTT Docomo Incorporated (Nippon Telegraph and Telephone Corporation)
• Inventors: Suzuki, Yasunori, Uchida, Motoyuki, Nojima, Toshio
• Primary Examiner(s): SUMMONS, BARBARA
• Application Number:
  US09/749,807
• Publication Number:
  US 20010006359A1
• Time in Patent Office: 992 Days
• Field of Search: 333/14, 333/109, 333/17.1, 333/17.2, 330/107, 330/136, 455/72
• US Class Current: 333/14
• CPC Class Codes: H04L 27/2621 Reduction thereof using phase offsets between subcarriers
• CPC Class Codes: H04L 27/2626 Arrangements specific to the transmitter only

Abstract

In an input signal power dynamic range compressing circuit, an input signal is distributed by a directional coupler to a linear signal transfer path and a compressing signal generating path, and in the compressing signal generating path a compressing signal, which keeps the peak-to-average-power ratio of the input signal below a predetermined value, is generated from the input signal. The compressing signal is combined by a power combiner with the input signal having passed through the linear signal transfer path.

Claims

1. A signal power dynamic range compressing circuit comprising:

a directional coupler for distributing an input signal to two paths;

a linear signal transfer path over which to linearly transfer the one distributed input signal;

a compressing signal generating path for generating a compressing signal containing a component opposite in phase to the other distributed input signal; and

a power combiner for power-combining output signals from said linear signal transfer path and said compressing signal generating path.

2. The circuit of claim 1, wherein said compressing signal generating path comprises:

a level discriminator for detecting the peak power of said input signal above a predetermined level;

a peak power detector responsive to the detection of said peak power to detect the phase of said input signal;

a low-frequency oscillator for generating a low-frequency signal nearly 180°

out of phase with said detected phase; and

a frequency converter for converting said low-frequency signal to a desired frequency band and for outputting said frequency-converted signal as said compressing signal.

3. The circuit of claim 1, wherein said compressing signal generating path comprises:

a level discriminator for detecting the peak power of said input signal above a predetermined level;

a peak power detector responsive to the detection of said peak power to detect the amplitude of said input signal;

a low-frequency oscillator having set therein said detected amplitude, for generating a low-frequency signal nearly 180°

out of phase with the phase of said input signal; and

a frequency converter for converting said low-frequency signal to a desired frequency band and for outputting said frequency-converted signal as said compressing signal.

4. The circuit of claim 1, wherein said compressing signal generating path comprises:

a level discriminator for detecting the peak power of said input signal above a predetermined level;

a peak power detector responsive to the detection of said peak power to detect the phase and amplitude of said input signal;

a low-frequency oscillator for generating a low-frequency signal nearly 180°

out of phase with said detected phase of said input signal;

modulating signal generating means for generating a predetermined modulating signal;

a modulation circuit for modulating said low-frequency signal by said modulating signal to generate a modulated low-frequency signal; and

a frequency converter for converting said modulated low-frequency signal to a desired frequency band and for outputting said frequency-converted signal as said compressing signal.

5. The circuit of claim 4, wherein said modulating signal generating means is a code generator for generating a code of a specific pattern as said modulating signal.

6. The circuit of claim 2 or 3, wherein said compressing signal generating path further comprises a compressing signal adjustment part for controlling said low-frequency oscillator so that the peak power of said combined signal distributed from said power combiner goes down below a preset value.

7. The circuit of claim 6, wherein said compressing signal adjustment part comprises:

combined signal level discriminating means for discriminating the level of said distributed combined signal above a preset value;

a combined signal peak power detector responsive to the detection of said signal level above said preset value to detect a phase and amplitude of said combined signal; and

a control circuit for controlling said low-frequency oscillator based on said detected phase and amplitude of said combined signal so that the level of said combined signal goes down to below said predetermined value.

8. The circuit of any one of claims 2, 3, and 4, wherein said frequency converter frequency-converts said low-frequency signal to a frequency band different from that of said input signal.

9. The circuit of any one of claims 2, 3, and 4, wherein said frequency converter frequency-converts said low-frequency signal to the same frequency band as that of said input signal.

10. The circuit of any one of claims 1 to 4, wherein said compressing signal generating path comprises a variable phase shifter for adjusting the phase of said compressing signal and variable amplitude means for adjusting the amplitude of said compressing signal, and which further comprises a compressing signal adjustment part for controlling said variable phase shifter and said variable amplitude means so that the peak power of said combined signal distributed from said power combiner goes down below a preset value.

11. The circuit of claim 10, wherein said compressing signal adjustment part comprises:

combined signal level discriminating means for discriminating the level of said distributed combined signal above a preset value;

a combined signal peak power detector responsive to the detection said signal level above said preset value to detect the phase and amplitude of said combined signal; and

a control circuit for controlling said variable phase shifter and said variable amplitude means based on said detected phase and amplitude of said combined signal so that the level of said combined signal goes down to below said predetermined value.

12. The circuit of claim 10, wherein said compressing signal generating path further comprises a compressing signal adjustment part for controlling said variable phase shifter and said variable amplitude means so that the peak-to-average-power of said combined signal distributed from said power distributor goes down below a preset value.

13. The circuit of claim 12, wherein said compressing signal adjustment part comprises:

peak-to-average-power ratio detecting means for detecting the peak-to-average-power ratio of said distributed combined signal above a preset value; and

a control circuit responsive to the detection of said peak-to-average-power ratio of said combined signal above said preset value to control said variable phase shifter and said variable amplitude means so that said detected peak-to-average-power ratio goes down below said preset value.

14. The circuit of claim 1, wherein said compressing signal generating path comprises:

an orthogonal detector for performing orthogonal detection of said input signal and for outputting the phase and amplitude of said input signal;

a constant-envelope composing signal generator for inverting said detected phase of said input signal to generate an inverted-phase signal; and

a frequency converter for converting said inverted phase signal to a desired frequency band and for outputting said frequency-converted signal as said compressing signal.

15. The circuit of claim 1, wherein said compressing signal generating path comprises:

an envelope detector for detecting the envelope of said input signal and for outputting the phase and amplitude of said input signal;

a constant-envelope composing signal generator for inverting said detected phase of said input signal to generate an inverted-phase signal; and

a frequency converter for converting said inverted phase signal to a desired frequency band and for outputting said frequency-converted signal as said compressing signal.

16. The circuit of claim 14 or 15, wherein said compressing signal generating path comprises a variable phase shifter for adjusting the phase of said compressing signal and variable amplitude means for adjusting the amplitude of said compressing signal, and which further comprises a compressing signal adjustment part for controlling said variable phase shifter and said variable amplitude means so that the peak power of said combined signal distributed from said power combiner goes down below a preset value.

17. The circuit of claim 16, wherein said compressing signal adjustment part comprises:

power ratio detecting means for detecting the peak-to-average-power ratio of said distributed combined signal above a preset value; and

a control circuit responsive to the detection of said power ratio of said combined signal above said preset value to control said variable phase shifter and said variable amplitude means so that said power ratio goes down below said preset value.

18. A power amplifying circuit which uses said signal power dynamic range compressing circuit of any one of claims 2, 3, 14, and 15 and comprises said signal power dynamic range compressing circuit and a power amplifier connected to the output of said power combiner.

19. The power amplifying circuit of claim 18, which further comprises compressing signal cancel means connected to the output side of said power amplifier for canceling said compressing signal.

20. The power amplifying circuit of claim 19, wherein said compressing signal cancel means is a filter.

21. The power amplifying circuit of claim 19, wherein said compressing signal cancel means comprises:

a directional coupler inserted between said compressing signal generating path and said power combiner, for providing said compressing signal to said power combiner connected to one output terminal of said directional coupler itself and for distributing said compressing signal to the other output terminal;

a combined signal generator for generating, based on said compressing signal fed from said other output terminal of said directional coupler, a combined signal nearly 180°

out of phase with said compressing signal; and

a power combiner/distributor for combining said combined signal and the output from said power amplifier to provide the output from said power amplifying circuit.

22. The power amplifying circuit of claim 21, wherein said combined signal generator comprises a phase inverter for inverting the phase of said distributed compressing signal, a variable phase shifter for adjusting the phase value of said phase-inverted compressing signal, and variable amplitude means for adjusting the amplitude of said phase-adjusted compressing signal and for applying said amplitude-adjusted compressing signal to said power combiner/distributor, said power amplifying circuit further comprising a combined signal control circuit for detecting the peak power of the output signal from said power amplifying circuit distributed by said power combiner/distributor to detect the phase and amplitude of said distributed output signal at that time and for controlling said variable phase shifter and said variable amplitude means based on said detected phase and amplitude.

23. The power amplifying circuit of claim 21, wherein said combined signal generator comprises a phase inverter for inverting the phase of said distributed compressing signal, a variable phase shifter for adjusting the phase value of said phase-inverted compressing signal, and variable amplitude means for adjusting the amplitude of said phase-adjusted compressing signal and for applying said amplitude-adjusted compressing signal to said power combiner/distributor, said power amplifying circuit further comprising a combined signal control circuit for detecting the peak-to-average-power ratio of the output signal from said power amplifying circuit distributed by said power combiner/distributor and for controlling said variable phase shifter and said variable amplitude means so that said detected value of said peak-to-average-power ratio does not exceed a predetermined value.